DM9010BI
Industrial-temperature Single Chip Ethernet Controller with General Processor Interface
5.9
5.8
T4
0, RO
100BASE-T4 Support
1 = 100BASE-T4 is supported by the link partner
0 = 100BASE-T4 is not supported by the link partner
100BASE-TX Full Duplex Support
1 = 100BASE-TX full duplex is supported by the link partner
0 = 100BASE-TX full duplex is not supported by the link partner
100BASE-TX Support
1 = 100BASE-TX half duplex is supported by the link partner
0 = 100BASE-TX half duplex is not supported by the link partner
10BASE-T Full Duplex Support
1 = 10BASE-T full duplex is supported by the link partner
0 = 10BASE-T full duplex is not supported by the link partner
10BASE-T Support
TX_FDX
TX_HDX
10_FDX
10_HDX
Selector
0, RO
0, RO
0, RO
0, RO
5.7
5.6
5.5
1 = 10BASE-T half duplex is supported by the link partner
0 = 10BASE-T half duplex is not supported by the link partner
5.4-5.0
<00000>, RO Protocol Selection Bits
Link partner’s binary encoded protocol selector
8.7 Auto-negotiation Expansion Register (ANER) - 06
Bit
Bit Name
Default
Description
6.15-6.5
Reserved
0, RO
Reserved
Read as 0, ignore on write
6.4
6.3
6.2
PDF
0, RO/LH
0, RO
Local Device Parallel Detection Fault
PDF = 1: A fault detected via parallel detection function.
PDF = 0: No fault detected via parallel detection function
Link Partner Next Page Able
LP_NP_ABLE = 1: Link partner, next page available
LP_NP_ABLE = 0: Link partner, no next page
Local Device Next Page Able
LP_NP_ABLE
NP_ABLE
0,RO/P
NP_ABLE = 1: DM9010BI, next page available
NP_ABLE = 0: DM9010BI, no next page
DM9010BI does not support this function, so this bit is always 0
New Page Received
A new link code word page received. This bit will be automatically
cleared when the register (register 6) is read by management
Link Partner Auto-negotiation Able
6.1
6.0
PAGE_RX
0, RO/LH
0, RO
LP_AN_ABLE
A “1” in this bit indicates that the link partner supports
Auto-negotiation
8.8 DAVICOM Specified Configuration Register (DSCR) - 16
Bit
Bit Name
Default
Description
16.15
BP_4B5B
0,RW
Bypass 4B5B Encoding and 5B4B Decoding
1 = 4B5B encoder and 5B4B decoder function bypassed
0 = Normal 4B5B and 5B4B operation
16.14
16.13
BP_SCR
0, RW
0, RW
Bypass Scrambler/Descrambler Function
1 = Scrambler and descrambler function bypassed
0 = Normal scrambler and descrambler operation
Bypass Symbol Alignment Function
BP_ALIGN
1 = Receive functions (descrambler, symbol alignment and symbol
decoding functions) bypassed. Transmit functions (symbol encoder
and scrambler) bypassed
Preliminary
35
Version: DM9010BI--DS-P01
January 12, 2010
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
