DS1921H/Z
MEMORY/CONTROL FUNCTION FLOW CHART Figure 10-2
From Figure 10
To Figure 10
rd Part
st Part
3
55H
Copy
F0H
Read
1
N
Scratchpad
Memory
N
Y
Y
DS1921 sets
EMCLR = 0
DS1921 sets
EMCLR = 0
Master TX
Master TX
TA1 (T7:T0), TA2 (T15:T8)
TA1 (T7:T0), TA2 (T15:T8)
DS1921 sets Memory
Address = (T15:T0)
Master TX
E/S Byte
Master RX Data Byte
from Memory Address
N
Authorization
Code Match?
DS1921 Incre-
ments Address
Counter
Y
AA = 1
Master
TX Reset?
DS1921 Copies Scratchpad
Data to Memory
Y
N
N
End of
Memory?
Master
RX "1"s
Master
RX "1"s
Copying
Finished
Y
N
N
Master RX "0"s
Master
TX Reset?
Y
DS1921 TX "0"
Y
Y
Master
TX Reset?
N
DS1921 TX "1"
Master
TX Reset?
N
Y
To Figure 10
1st Part
From Figure 10
rd Part
3
19 of 44
DALLAS [ DALLAS SEMICONDUCTOR ]
