DS1921H/Z
MEMORY/CONTROL FUNCTION FLOW CHART Figure 10-1
From ROM Functions
Flow Chart (Figure 12)
Master TX Memory or
Control Fkt. Command
To Figure 10
2nd Part
0FH
Write
AAH
Read
N
Scratchpad
Scratchpad
N
Y
Y
DS1921 sets
EMCLR = 0
DS1921 sets
EMCLR = 0
Master TX
Master RX
TA1 (T7:T0), TA2 (T15:T8)
TA1 (T7:T0), TA2 (T15:T8)
DS1921 sets Scratch-
pad Offset = (T4:T0)
and Clears (PF, AA)
Master RX Ending
Offset with Data
Status (E/S)
DS1921 sets Scratch-
pad Offset = (T4:T0)
Master TX Data Byte
to Scratchpad Offset
DS1921 sets (E4:E0)
= Scratchpad Offset
Master RX Data Byte
from Scratchpad Offset
Y
Y
Master
Master
TX Reset?
TX Reset?
DS1921 Incre-
ments Scratch-
pad Offset
DS1921 Incre-
ments Scratch-
pad Offset
N
N
Scratch-
pad Offset =
11111b?
Scratch-
pad Offset =
11111b?
N
Y
N
Y
Partial
Byte Written?
Y
Y
Master RX CRC16 of
Command, Address Data,
Master
TX Reset?
PF = 1
E/S Byte, and Data Starting
N
at the Target Address
N
Master RX CRC16 of
Command, Address, Data
Y
Master
TX Reset?
Y
N
Master
TX Reset?
Master RX "1"s
N
Master RX "1"s
From Figure 10
2nd Part
To ROM Functions
Flow Chart (Figure 12)
18 of 44
DALLAS [ DALLAS SEMICONDUCTOR ]
