CY8C27x43 Final Data Sheet
3. Electrical Specifications
3.4.4
AC Digital Block Specifications
The following table lists guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C ≤ TA ≤ 85°C, or 3.0V to 3.6V and -40°C ≤ TA ≤ 85°C, respectively. Typical parameters apply to 5V and 3.3V at 25°C and
are for design guidance only.
Table 3-22. AC Digital Block Specifications
Function
Description
Maximum Block Clocking Frequency (> 4.75V)
Maximum Block Clocking Frequency (< 4.75V)
Capture Pulse Width
Min
Typ
Max
49.2
Units
Notes
4.75V < Vdd < 5.25V.
All
Functions
Timer
24.6
–
3.0V < Vdd < 4.75V.
50a
–
ns
Maximum Frequency, No Capture
Maximum Frequency, With Capture
Enable Pulse Width
–
–
–
–
–
49.2
24.6
–
MHz
MHz
ns
4.75V < Vdd < 5.25V.
50a
–
Counter
Maximum Frequency, No Enable Input
Maximum Frequency, Enable Input
–
–
49.2
24.6
MHz
MHz
4.75V < Vdd < 5.25V.
–
Dead Band Kill Pulse Width:
Asynchronous Restart Mode
20
–
–
–
–
ns
ns
50a
Synchronous Restart Mode
Disable Mode
50a
–
–
–
ns
Maximum Frequency
–
–
49.2
49.2
MHz
MHz
4.75V < Vdd < 5.25V.
4.75V < Vdd < 5.25V.
CRCPRS
Maximum Input Clock Frequency
–
(PRS Mode)
CRCPRS
(CRC Mode)
Maximum Input Clock Frequency
Maximum Input Clock Frequency
–
–
–
–
24.6
8.2
MHz
MHz
SPIM
SPIS
Maximum data rate at 4.1 MHz due to 2 x over
clocking.
Maximum Input Clock Frequency
–
–
–
4.1
–
ns
ns
50a
Width of SS_ Negated Between Transmissions
Maximum Input Clock Frequency b
Silicon A
Transmitter
–
–
–
–
16.4
24.6
MHz
MHz
Maximum data rate at 2.05 MHz due to 8 x over
clocking.
Maximum data rate at 3.08 MHz due to 8 x over
clocking.
Silicon B
Maximum Input Clock Frequency b
Silicon A
Receiver
–
–
–
–
16.4
24.6
MHz
MHz
Maximum data rate at 2.05 MHz due to 8 x over
clocking.
Maximum data rate at 3.08 MHz due to 8 x over
clocking.
Silicon B
a. 50 ns minimum input pulse width is based on the input synchronizers running at 24 MHz (42 ns nominal period).
b. Refer to the Ordering Information chapter on page 42.
August 3, 2004
Document No. 38-12012 Rev. *I
32
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