4. Packaging Information
This chapter illustrates the packaging specifications for the CY8C27x43 PSoC device, along with the thermal impedances for each
package and the typical package capacitance on crystal pins.
Important Note Emulation tools may require a larger area on the target PCB than the chip’s footprint. For a detailed description of
the emulation tools’ dimensions, refer to the document titled PSoC Emulator Pod Dimensions at
http://www.cypress.com/support/link.cfm?mr=poddim.
4.1
Packaging Dimensions
51-85075 - *A
Figure 4-1. 8-Lead (300-Mil) PDIP
August 3, 2004
© Cypress MicroSystems, Inc. 2003 — Document No. 38-12012 Rev. *I
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CYPRESS [ CYPRESS ]
