CY8C24x23A Final Data Sheet
3. Electrical Specifications
Table 3-31. 2.7V AC Analog Output Buffer Specifications
Symbol
Description
Rising Settling Time to 0.1%, 1V Step, 100pF Load
Power = Low
Min
Typ
Max
Units
Notes
TROB
–
–
–
–
4
4
µs
Power = High
µs
TSOB
Falling Settling Time to 0.1%, 1V Step, 100pF Load
Power = Low
–
–
–
–
3
3
µs
µs
Power = High
SRROB
SRFOB
BWOB
Rising Slew Rate (20% to 80%), 1V Step, 100pF Load
Power = Low
0.4
0.4
–
–
–
–
V/µs
V/µs
Power = High
Falling Slew Rate (80% to 20%), 1V Step, 100pF Load
Power = Low
0.4
0.4
–
–
–
–
V/µs
V/µs
Power = High
Small Signal Bandwidth, 20mVpp, 3dB BW, 100pF Load
0.6
0.6
–
–
–
–
MHz
MHz
Power = Low
Power = High
BWOB
Large Signal Bandwidth, 1Vpp, 3dB BW, 100pF Load
180
180
–
–
–
–
kHz
kHz
Power = Low
Power = High
3.4.6
AC External Clock Specifications
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40°C ≤ TA ≤ 85°C, 3.0V to 3.6V and -40°C ≤ TA ≤ 85°C, or 2.4V to 3.0V and -40°C ≤ TA ≤ 85°C, respectively. Typical parameters
apply to 5V, 3.3V, and 2.7V at 25°C and are for design guidance only.
Table 3-32. 5V AC External Clock Specifications
Symbol
Description
Min
0.093
Typ
Max
24.6
Units
MHz
Notes
FOSCEXT
Frequency
–
–
–
–
High Period
Low Period
20.6
20.6
150
–
–
–
5300
ns
ns
µs
–
–
Power Up IMO to Switch
Table 3-33. 3.3V AC External Clock Specifications
Symbol
Description
Min
Typ
Max
Units
Notes
Frequency with CPU Clock divide by 1a
FOSCEXT
0.093
0.186
–
–
12.3
24.6
MHz
MHz
Frequency with CPU Clock divide by 2 or greaterb
High Period with CPU Clock divide by 1
Low Period with CPU Clock divide by 1
Power Up IMO to Switch
FOSCEXT
–
–
–
41.7
41.7
150
–
–
–
5300
ns
ns
µs
–
–
a. Maximum CPU frequency is 12 MHz at 3.3V. With the CPU clock divider set to 1, the external clock must adhere to the maximum frequency and duty cycle requirements.
b. If the frequency of the external clock is greater than 12 MHz, the CPU clock divider must be set to 2 or greater. In this case, the CPU clock divider will ensure that the fifty per-
cent duty cycle requirement is met.
September 8, 2004
Document No. 38-12028 Rev. *B
37
CYPRESS [ CYPRESS ]
