4. Packaging Information
This chapter illustrates the packaging specifications for the CY8C24x23A PSoC device, along with the thermal impedances for each
package and the typical package capacitance on crystal pins.
Important Note Emulation tools may require a larger area on the target PCB than the chip’s footprint. For a detailed description of
the emulation tools’ dimensions, refer to the document titled PSoC Emulator Pod Dimensions at
http://www.cypress.com/support/link.cfm?mr=poddim.
4.1
Packaging Dimensions
51-85075 - *A
Figure 4-1. 8-Lead (300-Mil) PDIP
September 8, 2004
Document No. 38-12028 Rev. *B
40
CYPRESS [ CYPRESS ]
