CY7C68013A/CY7C68014A
CY7C68015A/CY7C68016A
9.0
9.1
AC Electrical Characteristics
USB Transceiver
USB 2.0-compliant in full- and high-speed modes.
9.2
Program Memory Read
tCL
[17]
CLKOUT
tAV
tAV
A[15..0]
tSTBH
tSTBL
PSEN#
D[7..0]
[18]
tACC1
tDH
data in
tSOEL
OE#
CS#
tSCSL
Figure 9-1. Program Memory Read Timing Diagram
Table 9-1. Program Memory Read Parameters
Parameter Description
1/CLKOUT Frequency
Min.
Typ.
20.83
41.66
83.2
Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
48 MHz
24 MHz
12 MHz
t
CL
t
t
t
t
t
t
t
Delay from Clock to Valid Address
Clock to PSEN Low
Clock to PSEN High
Clock to OE Low
0
0
0
10.7
8
AV
STBL
STBH
SOEL
SCSL
DSU
8
11.1
13
Clock to CS Low
Data Set-up to Clock
Data Hold Time
9.6
0
DH
Notes:
17. CLKOUT is shown with positive polarity.
18. tACC1 is computed from the above parameters as follows:
tACC1(24 MHz) = 3*tCL – tAV –tDSU = 106 ns
tACC1(48 MHz) = 3*tCL – tAV – tDSU = 43 ns.
Document #: 38-08032 Rev. *G
Page 36 of 55
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