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CY7C1049DV33-10VXI 参数 Datasheet PDF下载

CY7C1049DV33-10VXI图片预览
型号: CY7C1049DV33-10VXI
PDF下载: 下载PDF文件 查看货源
内容描述: 取消当4兆位( 512K的×8 )静态RAM自动断电 [4-Mbit (512 K x 8) Static RAM Automatic power down when deselected]
分类和应用:
文件页数/大小: 14 页 / 847 K
品牌: CYPRESS [ CYPRESS SEMICONDUCTOR ]
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CY7C1049DV33
Switching Waveforms
(continued)
Figure 6. Write Cycle No. 2 (WE Controlled, OE LOW)
t
WC
ADDRESS
t
SCE
CE
t
AW
t
SA
WE
t
SD
DATA I/O
NOTE 19
t
HZWE
DATA VALID
t
PWE
t
HA
t
HD
t
LZWE
Figure 7. Write Cycle No. 3 (CE Controlled)
t
WC
ADDRESS
t
SCE
CE
t
SA
t
AW
t
PWE
WE
t
SD
DATA I/O
DATA VALID
t
HD
t
SCE
t
HA
Notes
18. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high impedance state.
19. During this period the IOs are in the output state and input signals must not be applied.
20. Data IO is high impedance if OE = V
IH
.
Document Number: 38-05475 Rev. *G
Page 8 of 14