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CY37064VP100-143AC 参数 Datasheet PDF下载

CY37064VP100-143AC图片预览
型号: CY37064VP100-143AC
PDF下载: 下载PDF文件 查看货源
内容描述: 5V , 3.3V , ISR ™高性能的CPLD [5V, 3.3V, ISR⑩ High-Performance CPLDs]
分类和应用: 可编程逻辑器件输入元件时钟
文件页数/大小: 63 页 / 1784 K
品牌: CYPRESS [ CYPRESS ]
 浏览型号CY37064VP100-143AC的Datasheet PDF文件第10页浏览型号CY37064VP100-143AC的Datasheet PDF文件第11页浏览型号CY37064VP100-143AC的Datasheet PDF文件第12页浏览型号CY37064VP100-143AC的Datasheet PDF文件第13页浏览型号CY37064VP100-143AC的Datasheet PDF文件第15页浏览型号CY37064VP100-143AC的Datasheet PDF文件第16页浏览型号CY37064VP100-143AC的Datasheet PDF文件第17页浏览型号CY37064VP100-143AC的Datasheet PDF文件第18页  
Ultra37000 CPLD Family  
DC Voltage Applied to Outputs  
5.0V Device Characteristics  
Maximum Ratings  
in High-Z State................................................–0.5V to +7.0V  
DC Input Voltage ............................................–0.5V to +7.0V  
DC Program Voltage............................................. 4.5 to 5.5V  
Current into Outputs .................................................... 16 mA  
(Above which the useful life may be impaired. For user guide-  
lines, not tested.)  
Storage Temperature .................................65°C to +150°C  
Static Discharge Voltage...........................................> 2001V  
(per MIL-STD-883, Method 3015)  
Ambient Temperature with  
Power Applied.............................................55°C to +125°C  
Latch-up Current.....................................................> 200 mA  
Supply Voltage to Ground Potential............... –0.5V to +7.0V  
Operating Range[2]  
Ambient  
Junction  
Temperature  
Output  
Condition  
Range  
Temperature[2]  
VCC  
VCCO  
Commercial  
0°C to +70°C  
–40°C to +85°C  
–55°C to +125°C  
0°C to +90°C  
–40°C to +105°C  
–55°C to +130°C  
5V  
5V ± 0.25V  
5V ± 0.25V  
5V ± 0.5V  
5V ± 0.5V  
5V ± 0.5V  
5V ± 0.5V  
5V ± 0.25V  
3.3V ± 0.3V  
5V ± 0.5V  
3.3V ± 0.3V  
5V ± 0.5V  
3.3V ± 0.3V  
3.3V  
5V  
Industrial  
Military[3]  
3.3V  
5V  
3.3V  
5.0V Device Electrical Characteristics Over the Operating Range  
Parameter  
Description  
Test Conditions  
Min. Typ. Max. Unit  
VOH  
Output HIGH Voltage  
VCC = Min.  
VCC = Max.  
IOH = –3.2 mA (Com’l/Ind)[4] 2.4  
V
V
IOH = –2.0 mA (Mil)[4]  
2.4  
VOHZ  
Output HIGH Voltage with  
Output Disabled[5]  
IOH = 0 µA (Com’l)[6]  
4.2  
4.5  
V
IOH = 0 µA (Ind/Mil)[6]  
IOH = –100 µA (Com’l)[6]  
IOH = –150 µA (Ind/Mil)[6]  
IOL = 16 mA (Com’l/Ind)[4]  
IOL = 12 mA (Mil)[4]  
V
3.6  
V
3.6  
V
VOL  
Output LOW Voltage  
VCC = Min.  
0.5  
V
0.5  
V
VIH  
VIL  
IIX  
Input HIGH Voltage  
Input LOW Voltage  
Input Load Current  
Output Leakage Current  
Guaranteed Input Logical HIGH Voltage for all Inputs[7]  
Guaranteed Input Logical LOW Voltage for all Inputs[7]  
VI = GND OR VCC, Bus-Hold Disabled  
2.0  
–0.5  
–10  
VCCmax  
0.8  
V
V
10  
µA  
µA  
IOZ  
IOS  
IBHL  
VO = GND or VCC, Output Disabled, Bus-Hold Disabled –50  
50  
OutputShortCircuitCurrent[8, 5] VCC = Max., VOUT = 0.5V  
–30  
+75  
–160 mA  
Input Bus-Hold LOW  
Sustaining Current  
VCC = Min., VIL = 0.8V  
VCC = Min., VIH = 2.0V  
VCC = Max.  
µA  
IBHH  
Input Bus-Hold HIGH  
Sustaining Current  
–75  
µA  
+500 µA  
–500 µA  
IBHLO  
Input Bus-Hold LOW  
Overdrive Current  
IBHHO  
Input Bus-Hold HIGH  
Overdrive Current  
VCC = Max.  
Notes:  
2. Normal Programming Conditions apply across Ambient Temperature Range for specified programming methods. For more information on programming the  
Ultra37000 Family devices, please refer to the Application Note titled “An Introduction to In System Reprogramming with the Ultra37000.”  
3.  
TA is the “Instant On” case temperature.  
4. IOH = –2 mA, IOL = 2 mA for TDO.  
5. Tested initially and after any design or process changes that may affect these parameters.  
6. When the I/O is output disabled, the bus-hold circuit can weakly pull the I/O to above 3.6V if no leakage current is allowed. Note that all I/Os are output disabled  
during ISR programming. Refer to the application note “Understanding Bus-Hold” for additional information.  
7. These are absolute values with respect to device ground. All overshoots due to system or tester noise are included.  
8. Not more than one output should be tested at a time. Duration of the short circuit should not exceed 1 second. VOUT = 0.5V has been chosen to avoid test  
problems caused by tester ground degradation.  
Document #: 38-03007 Rev. *C  
Page 14 of 62  
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