Ultra37000 CPLD Family
Logic Block Diagrams (continued)
TDI
JTAG Tap
CY37128/CY37128V (160-lead TQFP)
CLOCK
INPUTS
TCK
TMS
TDO
INPUTS
1
Controller
4
INPUT/CLOCK
MACROCELLS
INPUT
MACROCELL
JTAGEN
4
4
16 I/Os
LOGIC
BLOCK
A
LOGIC
BLOCK
H
16 I/Os
I/O –I/O
36
16
36
16
0
15
I/O –I/O
112
127
PIM
LOGIC
BLOCK
B
LOGIC
BLOCK
G
16 I/Os
16 I/Os
16 I/Os
16 I/Os
36
16
36
16
I/O –I/O
I/O –I/O
96 111
16
31
47
LOGIC
BLOCK
C
LOGIC
BLOCK
F
36
16
36
16
I/O –I/O
I/O –I/O
80
32
95
79
16 I/Os
LOGIC
BLOCK
D
LOGIC
BLOCK
E
16 I/Os
36
16
36
16
I/O –I/O
I/O –I/O
64
28
63
64
64
Clock/
Input
CY37192/CY37192V (160-lead TQFP)
Input
4
1
4
4
36
36
LOGIC
LOGIC
BLOCK
L
10 I/Os
9
10 I/Os
I/O –I/O
BLOCK
A
16
36
16
36
16
36
16
36
16
16
36
I/O –I/O
110
119
0
10 I/Os
I/O –I/O
10 I/Os
LOGIC
BLOCK
B
LOGIC
BLOCK
K
16
36
16
36
16
I/O –I/O
10
100
109
19
10 I/Os
I/O –I/O
99
10 I/Os
LOGIC
BLOCK
C
LOGIC
BLOCK
J
I/O –I/O
20
29
90
PIM
10 I/Os
I/O –I/O
10 I/Os
39
LOGIC
BLOCK
D
LOGIC
BLOCK
I
I/O –I/O
30
80
89
36
16
36
10 I/Os
I/O –I/O
10 I/Os
49
LOGIC
BLOCK
E
LOGIC
BLOCK
H
I/O –I/O
40
70
79
69
36
16
10 I/Os
I/O –I/O
10 I/Os
LOGIC
BLOCK
F
LOGIC
BLOCK
G
I/O –I/O
50
16
60
59
TDI
TCK
TMS
60
60
JTAG Tap
Controller
TDO
Document #: 38-03007 Rev. *C
Page 10 of 62
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