CYW4343X
10.1.6.4 Long Frame Sync, Slave Mode
Figure 36. PCM Timing Diagram (Long Frame Sync, Slave Mode)
1
2
3
PCM_BCLK
4
5
PCM_SYNC
PCM_OUT
9
Bit 0
Bit 0
HIGH IMPEDANCE
8
Bit 1
6
7
Bit 1
PCM_IN
Table 12. PCM Interface Timing Specifications (Long Frame Sync, Slave Mode)
Ref No.
Characteristics
Minimum
Typical
Maximum
12
Unit
1
2
3
4
5
6
7
8
9
PCM bit clock frequency
PCM bit clock low
PCM bit clock high
PCM_SYNC setup
PCM_SYNC hold
PCM_OUT delay
PCM_IN setup
–
–
–
–
–
–
–
–
–
–
MHz
ns
41
41
8
–
–
ns
–
ns
8
–
ns
0
25
–
ns
8
ns
PCM_IN hold
8
–
ns
Delay from rising edge of PCM_BCLK during last bit period to
PCM_OUT becoming high impedance
0
25
ns
10.2 UART Interface
The CYW4343X shares a single UART for Bluetooth and FM. The UART is a standard 4-wire interface (RX, TX, RTS, and CTS) with
adjustable baud rates from 9600 bps to 4.0 Mbps. The interface features an automatic baud rate detection capability that returns a
baud rate selection. Alternatively, the baud rate may be selected through a vendor-specific UART HCI command.
The UART has a 1040-byte receive FIFO and a 1040-byte transmit FIFO to support EDR. Access to the FIFOs is conducted through
the Advanced High Performance Bus (AHB) interface through either DMA or the CPU. The UART supports the Bluetooth 4.1 UART
HCI specification: H4 and H5. The default baud rate is 115.2 Kbaud.
The UART supports the 3-wire H5 UART transport as described in the Bluetooth specification (Three-wire UART Transport Layer).
Compared to H4, the H5 UART transport reduces the number of signal lines required by eliminating the CTS and RTS signals.
The CYW4343X UART can perform XON/XOFF flow control and includes hardware support for the Serial Line Input Protocol (SLIP).
It can also perform a wake-on activity function. For example, activity on the RX or CTS inputs can wake the chip from a sleep state.
Normally, the UART baud rate is set by a configuration record downloaded after device reset or by automatic baud rate detection,
and the host does not need to adjust the baud rate. Support for changing the baud rate during normal HCI UART operation is
included through a vendor-specific command that allows the host to adjust the contents of the baud rate registers. The CYW4343X
UARTs operate correctly with the host UART as long as the combined baud rate error of the two devices is within ±2% (see
Table 13).
Document No. 002-14797 Rev. *H
Page 52 of 128
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