PRELIMINARY
CYW43438
19.4 LNLDO
Table 39. LNLDO Specifications
Specification
Notes
Min.
Typ.
Max.
Units
Min. VIN = VO + 0.15V = 1.35V
(where VO = 1.2V) dropout voltage requirement must be
met under maximum load.
Input supply voltage, Vin
1.3
1.35
1.5
V
Output current
–
0.1
1.1
–
–
1.2
–
150
1.275
150
+4
mA
V
Output voltage, Vo
Dropout voltage
Programmable in 25 mV steps.Default = 1.2V
At maximum load
mV
%
Output voltage DC accuracy
Includes line/load regulation
No load
–4
–
–
10
970
–
12
µA
Quiescent current
Max. load
–
990
5
µA
Line regulation
Load regulation
Leakage current
Output noise
Vin from (Vo + 0.15V) to 1.5V, 200 mA load
–
mV/V
Load from 1 mA to 200 mA:
Vin ≥ (Vo + 0.12V)
–
–
–
0.025
0.045
mV/mA
µA
Power-down, junction temp. = 85°C
5
–
20
@30 kHz, 60–150 mA load Co = 2.2 µF
@100 kHz, 60–150 mA load Co = 2.2 µF
60
35
nV/ Hz
–
PSRR
@1 kHz, Vin ≥ (Vo + 0.15V), Co = 4.7 μF
LDO turn-on time when rest of chip is up
Total ESR (trace/capacitor): 5 mΩ–240 mΩ
20
–
0.51
–
–
dB
µs
µF
LDO turn-on time
External output capacitor, Co
140
2.2
180
4.7
Only use an external input capacitor at the VDD_LDO pin
if it is not supplied from CBUCK output. Total ESR (trace/
capacitor): 30 mΩ–200 mΩ
External input capacitor
–
1
2.2
µF
1. Minimum capacitor value refers to the residual capacitor value after taking into account the part-to-part tolerance, DC-bias, temperature, and
aging.
Document Number: 002-14796 Rev. *K
Page 87 of 101
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