PRELIMINARY
CYW43438
19.2 3.3V LDO (LDO3P3)
Table 37. LDO3P3 Specifications
Specification
Notes
Min.
Typ.
Max.
Units
Min. = Vo + 0.2V = 3.5V dropout voltage
requirement must be met under maximum
load for performance specifications.
Input supply voltage, Vin
3.1
3.6
4.81
V
Output current
–
0.001
–
3.3
–
450
–
mA
V
Nominal output voltage, Vo
Dropout voltage
Default = 3.3V.
–
–
At max. load.
200
+5
mV
Output voltage DC accuracy
Quiescent current
Line regulation
Includes line/load regulation.
No load
–5
–
–
%
66
–
85
µA
Vin from (Vo + 0.2V) to 4.8V, max. load
load from 1 mA to 450 mA
–
3.5
0.3
mV/V
mV/mA
Load regulation
–
–
Vin ≥ Vo + 0.2V,
Vo = 3.3V, Co = 4.7 µF,
Max. load, 100 Hz to 100 kHz
PSRR
20
–
–
dB
LDO turn-on time
Chip already powered up.
–
160
4.7
250
µs
µF
Ceramic, X5R, 0402,
(ESR: 5 mΩ–240 mΩ), ± 10%, 10V
External output capacitor, Co
1.02
5.64
For SR_VDDBATA5V pin (shared with band
gap) Ceramic, X5R, 0402,
(ESR: 30m-200 mΩ), ± 10%, 10V.
Not needed if sharing VBAT capacitor 4.7 µF
with SR_VDDBATP5V.
External input capacitor
–
4.7
–
µF
1. The maximum continuous voltage is 4.8V. Voltages up to 6.0V for up to 10 seconds, cumulative duration, over the lifetime of the device are
allowed. Voltages as high as 5.0V for up to 250 seconds, cumulative duration, over the lifetime of the device are allowed.
2. Minimum capacitor value refers to the residual capacitor value after taking into account the part-to-part tolerance, DC-bias, temperature, and
aging.
Document Number: 002-14796 Rev. *K
Page 85 of 101
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