CYW43362
14.3 gSPI Signal Timing
The gSPI device always samples data on the rising edge of the clock.
Figure 27. gSPI Timing
Table 27. gSPI Timing Parameters
Parameter
Symbol
Minimum
Maximum
Units
Note
Clock period
T1
20.8
–
ns
Fmax = 48 MHz
Clock high/low
T2/T3
T4/T5
T6
(0.45 × T1) – T4
(0.55 × T1) – T4
ns
ns
ns
–
–
Clock rise/fall time
Input setup time
–
2.5
–
5.0
Setup time, SIMO valid to SPI_CLK
active edge
Input hold time
T7
T8
T9
5.0
5.0
5.0
–
–
–
ns
ns
ns
Hold time, SPI_CLK active edge to
SIMO invalid
Output setup time
Output hold time
Setup time, SOMI valid before
SPI_CLK rising
Hold time, SPI_CLK active edge to
SOMI invalid
CSX to clocka
Clock to CSXc
–
–
7.86
–
–
–
ns
ns
CSX fall to 1st rising edge
Last falling edge to CSX high
a. SPI_CSx remains active for entire duration of gSPI read/write/write_read transaction (i.e., overall words for multiple word transaction)
14.4 JTAG Timing
Table 28. JTAG Timing Characteristics
Output
Output
Signal Name
Period
Maximum
Minimum
Setup
Hold
TCK
TDI
125 ns
–
–
–
–
–
–
–
–
20 ns
20 ns
–
0 ns
0 ns
–
TMS
TDO
–
–
–
100 ns
–
0 ns
–
JTAG_TRST
250 ns
–
–
Document No. 002-14779 Rev. *G
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