CYW43362
Table 22. CLDO
Specification
Notes
Minimum
Typical
Maximum
Units
PSRR
20
40
–
dB
@1 kHz, Vin 1.5V,
Co = 1–2.2 µF
From full-chip power downa
Start-up time
–
–
1250
–
1400
180
µs
µs
LDO turn-on time
LDO turn-on time when
rest of chip is up
In-rush current during turn-on
From its output capacitor in fully
discharged state
–
–
–
150
–
mA
µF
External output capacitor, Co
(nominal values)
Ceramic, X5R, 0402,
(ESR: 30 mΩ–200 mΩ), ±10%, 10V
2.2
External input capacitor
(nominal values)
Only use an external
input cap at VDD_LDO
pin if it is not supplied
from CBUCK output.
–
1
2.2
µF
Ceramic, X5R, 0402, (ESR: 30 mΩ–
200 mΩ), ±10%, 10V
a. With CBUCK soft-starting concurrently.
12.4 LNLDO1
Table 23. LNLDO1
Specification
Notes
Minimum Typical Maximum
Units
Input supply voltage, Vin
Min = 1.25 + 0.2V = 1.45V
1.45
1.5
2.0
Volts
Dropout voltage requirement must be
met under max load.
Output current
–
–
–
150
mA
Output voltage, Vo
Programmable in 25 mV
steps
1.075
1.2
1.325
Volts
Dropout voltage
At max load
–
–
–
200
+4
mV
%
Output voltage DC accuracy
Include line/load regulation
Vin > Vo+0.2V
–4
Quiescent current
Line regulation
No-load
–
31
–
44
µA
Vin from (Vo+0.2V) to 2V,
max load
–0.2
+0.2
%Vo/V
Load regulation
Leakage current
Output noise
Load from 1 mA to 150 mA
Power-down
–
–
–
0.02
–
0.05
10
%Vo/mA
µA
@30 kHz, 60 mA load
Co = 2.2 µF
@100 kHz, 60 mA load
Co = 2.2 µF
–
60
30
nV/rt Hz
nV/rt Hz
PSRR
20
–
50
–
–
dB
µs
@1 kHz, Vin 1.5V, Co = 2.2 µF
LDO turn-on time
LDO turn-on time when
rest of chip is up
180
In-rush current during turn-on
From its output capacitor in fully
discharged state
–
–
–
150
–
mA
µF
External output capacitor, Co
(nominal values)
Ceramic, X5R, 0402,
(ESR: 30 mΩ–200 mΩ),
±10%, 10V
2.2
Note: Recommended inductor for CBUCK: 1.5 µH ± 20%.
Murata® LQM21PN1R5MC0 2.0 × 1.25 × 0.55 mm DCR = 0.26Ω ± 25%.
Murata LQM2MPN1R5NG0 2.0 × 1.60 × 1.00 mm DCR = 0.11Ω ± 25%.
Document No. 002-14779 Rev. *G
Page 51 of 60
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