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RS8953BEPJ 参数 Datasheet PDF下载

RS8953BEPJ图片预览
型号: RS8953BEPJ
PDF下载: 下载PDF文件 查看货源
内容描述: 高比特率数字用户线( HDSL )信道单元 [High-Bit-Rate Digital Subscriber Line (HDSL) channel unit]
分类和应用: 电信集成电路
文件页数/大小: 173 页 / 1229 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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4.0 Registers  
RS8953B/8953SPB  
4.2 HDSL Transmit  
HDSL Channel Unit  
REPEAT_EN  
Enable Repeater Mode—When set in both CH1 and CH2, REPEAT_EN cross-connects HDSL  
payload, SYNC, STUFF, and Z-bits from receive to transmit to implement a single pair  
repeater. REPEAT_EN has no effect in CH3. Transmit 6 ms frames are forced to align to  
cross-connected receive 6 ms frames. HOH bits (EOC, IND, and CRC) are inserted by each  
channels transmit HOH multiplexer to allow for translation of repeater specific IND bits.  
HDSL bit clocks, BCLK1, and BCLK2 can operate with separate phase, but must be identical  
in long-term frequency. Receive payload from CH1 and CH2 can still be mapped and PCM  
combined, but transmit PCM inputs are ignored.  
0 = Normal transmit  
1 = Cross-connect CH1 and CH2  
EXT_ZBIT  
Enable External Z-bits—Is set in conjunction with TAUX_EN when the system supplies the  
last 40 Z-bits for transmission from TAUXn input.  
0 = Last 40 Z-bits supplied by TZBIT2–TZBIT6 registers  
1 = Last 40 Z-bits supplied by TAUXn  
STUF_CNTR_MODE Selects the operation of the counter that measures the phase difference between the PCM and  
HDSL line clocks. If this bit is cleared in any of the registers for the three channels, the  
stuffing generator is in a mode ion which the counter is not allowed to wrap around. In this  
mode, the stuffing algorithm is based on only current conditions.  
When this bit is set in each of the registers for the 3 channels, the stuffing generator is in a  
mode in which the counter is allowed to wrap around. In this mode, the stuffing algorithm is  
based on both previous decisions and current conditions. This changes the stuffing pattern,  
which causes reduced low frequency wander and increased high frequency jitter.  
0 = Increased wander and decreased jitter (in any register)  
1 = Decreased wander and increased jitter (in all three registers)  
4-14  
Conexant  
N8953BDSB