RS8953B/8953SPB
4.0 Registers
HDSL Channel Unit
4.2 HDSL Transmit
0xDF—Transmit Z-Bits (TZBIT_2)
7
6
5
4
4
4
4
4
3
3
3
3
3
2
2
2
2
2
1
1
1
1
1
0
0
0
0
0
TZBIT[15:8]
TZBIT[23:16]
TZBIT[31:24]
TZBIT[39:32]
TZBIT[47:40]
0xE0—Transmit Z-Bits (TZBIT_3)
7
6
5
0xE1—Transmit Z-Bits (TZBIT_4)
7
6
5
0xE2—Transmit Z-Bits (TZBIT_5)
7
6
5
0xE3—Transmit Z-Bits (TZBIT_6)
7
6
5
TZBIT[47:0]
Transmit Z-bits is applicable only in E1_MODE [CMD_1; addr 0xE5]; otherwise, Z-bit
registers are ignored. TZBIT[47:0] holds 48 Z-bits for transmission in the first bit of each of
the 48 payload blocks. (See Figure 3-16 for Z-bit positions within the frame.) The first eight
Z-bits are individually output for each channel from TZBIT_1. The last 40 Z-bits are output to
all channels from a single set of TZBIT_2–TZBIT_6.
NOTE:
The system may also supply the last 40 Z-bits individually for each HDSL transmit
channel from the TAUXn inputs by setting TAUX_EN and EXT_ZBIT [TCMD_2;
addr 0x07].
N8953BDSB
Conexant
4-11
CONEXANT [ CONEXANT SYSTEMS, INC ]
