CX82100 Home Network Processor Data Sheet
12.4
Timer Registers Memory Map
Timer registers are identified in Table 12-2.
Table 12-2. Timer Registers
Register Label
Register Name
Timer 1 Counter Register
Timer 2 Counter Register
Timer 3 Counter Register
Timer 4 Counter Register
Timer 1 Limit Register
Timer 2 Limit Register
Timer 3 Limit Register
Timer 4 Limit Register
ASB Address
Type
RW
RW
RW
RW
RW
RW
RW
RW
Default Value
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Ref.
12.5.1
12.5.2
12.5.3
12.5.4
12.5.5
12.5.6
12.5.7
12.5.8
TM_Cnt1
TM_Cnt2
TM_Cnt3
TM_Cnt4
TM_Lmt1
TM_Lmt2
TM_Lmt3
TM_Lmt4
0x00350020
0x00350024
0x00350028
0x0035002C
0x00350030
0x00350034
0x00350038
0x0035003C
12.5
Timer Registers
12.5.1
Timer 1 Counter Register (TM_Cnt1: 0x00350020)
Bit(s)
15:0
Type
RO
Default
16’b0
Name
TM_Cnt1
Description
Timer 1 Current Counter Value.
Timer 1 increments every 1 µs, from 0 to the Timer 1 limit value, then
resets to 0 and counts again. TM_Cnt1 is reset whenever TM_Lmt1 is
written.
12.5.2
Timer 2 Counter Register (TM_Cnt2: 0x00350024)
Bit(s)
15:0
Type
RO
Default
16’b0
Name
TM_Cnt2
Description
Timer 2 Current Counter Value.
Timer 2 increments every 1 µs, from 0 to the Timer 2 limit value, then
resets to 0 and counts again. TM_Cnt2 is reset whenever TM_Lmt2 is
written.
101306C
Conexant Proprietary and Confidential Information
12-3
CONEXANT [ CONEXANT SYSTEMS, INC ]
