3.0 Registers
CX28394/28395/28398
3.16 System Bus Registers
Quad/x16/Octal—T1/E1/J1 Framers
THRU
Enable Transparent Robbed-Bit Signaling—RMSYNC is forced to align with respect to RX
timebase and to follow each change of receiver’s multiframe alignment, plus any frame offset
caused by RSLIP buffer delay. In this manner, RMSYNC is able to retain its signaling
multiframe alignment with respect to RPCMO output data frames. THRU mode is required
when RSLIP is configured in bypass mode. It is also useful for ADPCM transcoder systems
that utilize robbed-bit signaling during frames other than the normal (modulo 6) signaling
frames and therefore cannot utilize RPCMO signaling reinsertion in ADPCM coded channels.
During THRU mode, RMSYNC must be programmed as an output [PIO; addr 018].
RMSYNC can follow a change of RX multiframe alignment without generating an alarm
indication (e.g., receiver change of SF alignment without accompanying loss of basic frame
alignment).
0 = no effect
1 = transparent robbed-bit signaling
0D8—Signaling Reinsertion Frame Offset (RSYNC_FRM)
Unused bits are reserved and should be written to 0.
7
6
5
4
3
2
1
0
—
—
—
OFFSET[14]
OFFSET[13]
OFFSET[12]
OFFSET[11]
OFFSET[10]
OFFSET[14:10]
RSB Sync Frame Offset—Selects which RSB frame number coincides with RMSYNC pulse
in the range of frame 0–23. OFFSET specifies the frame in which RMSYNC is applied as an
input or in which RMSYNC appears as an output, consequently locating RPCMO signaling
frames used for T1 robbed-bit (frames 6,12,18, and 24) or E1 CAS signaling reinsertion. The
only RPCMO channels affected are those with signaling insertion enabled [INSERT; addr
0E0–0FF].
T1/E1N
OFFSET[14:10]
X0000
X0001
|
RMSYNC Pulse
RSB frame 0
RSB frame 1
|
0
0
|
0
0
1
1
|
X1110
X1111
00000
00001
|
RSB frame 14
RSB frame 15
RSB frame 1
RSB frame 2
|
1
1
10110
10111
RSB frame 23
RSB frame 24
3-104
Conexant
100054E