CX28394/28395/28398
3.0 Registers
Quad/x16/Octal—T1/E1/J1 Framers
3.16 System Bus Registers
DEBOUNCE
Debounce Receive ABCD Signaling—Applicable only to those channels where signaling
stack is enabled (SIG_STK; addr 180–19F). Output signaling buffer (RSIG) updates for these
channels are evaluated after D-bit signaling is received. New signaling is placed into RSIG and
STACK buffers only if the RSIG input and output values differ. DEBOUNCE filters single bit
errors on ABCD signaling. This is accomplished by comparing incoming ABCD bits on a
bit-by-bit basis with current buffered input and output ABCD bits and inverting the update
signaling bit value when incoming and output bits are equal. However, these differ from the
buffered input value below. At the end of each multiframe, the entire input ABCD value is
copied to the output ABCD value.
0 = no effect
1 = debounce receive ABCD signaling
Sig Input Current Bit I/O Update Bit I/O
Notes
—
0
0
0
0
1
1
1
1
00
01
10
11
00
01
10
11
00
00
00
01
10
11
11
11
Change output
Debounce
—
—
Debounce
Change output
—
NOTE(S): Normal (non-debounced) signaling always transfers ABCD input to ABCD output
buffer space coincident with the D-bit update.
FRZ_OFF/FRZ_ON Manual Signaling Update and SIGFRZ Output—Allows the processor to manually control
updates of the receive signaling buffer [RSIGn; addr 1A0–1BF], the signaling stack [addr
0DA], and the SIGFRZ output pin. FRZ_ON and FRZ_OFF control the SIGFRZ pin’s output
state, but do not affect normal operations of the SIGFRZ interrupt [ISR7; addr 004]. Receive
ABCD input signaling is placed into STACK and RSIG buffers according to the modes shown
below. Stack updates are individually enabled on a per-channel basis according to SIG_STK
[addr 180–19F].
SIGFRZ
FRZ_ON
FRZ_OFF
SIG_STK
Interrupt
Pin
0
STACK
No update
RSIGn
0
0
0
0
0
0
X
1
0
1
All ABCD
No update
All ABCD
All ABCD
All ABCD
No Update
1
No update
0
0
0
ABCD Changes
No Update
X
X
1
0
X
X
X
0
1
0
1
0
ABCD Changes
No update
X
1
100054E
Conexant
3-103
CONEXANT [ CONEXANT SYSTEMS, INC ]
