3.0 Registers
CX28394/28395/28398
3.1 Address Map
Quad/x16/Octal—T1/E1/J1 Framers
Table 3-4. Address Map (2 of 5)
Default
Register
Setting (Hex)
Address
(Hex)
Block
Acronym
R/W
Description
022
023
024
025
026
040
041
042
043
044
045
046
047
048
049
050
051
052
053
054
055
056
057
058
059
05A
05B
05C
05D
05E
05F
SER_CTL
SER_DAT
SER_STAT
SER_CONFIG
RAM TEST
RCR0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
Serial Control
Serial Data
—
—
—
00
—
—
Serial Status
Serial Configuration
Ram Test
Receiver Configuration
RPATT
RLB
Receive Test Pattern Configuration
Receive Loopback Code Detector Configuration
Loopback Activate Code Pattern
Loopback Deactivate Code Pattern
Receive Alarm Signal Configuration
Alarm/Error/Counter Latch Configuration
Alarm 1 Status
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
LBA
LBD
RALM
LATCH
ALM1
ALM2
ALM3
FERR
R
Alarm 2 Status
R
Alarm 3 Status
R
Framing Bit Error Counter LSB
Framing Bit Error Counter MSB
CRC Error Counter LSB
FERR
R
CERR
R
CERR
R
CRC Error Counter MSB
LCV
R
Line Code Violation Counter LSB
Line Code Violation Counter MSB
Far End Block Error Counter LSB
Far End Block Error Counter MSB
PRBS Bit Error Counter LSB
PRBS Bit Error Counter MSB
SEF/LOF/COFA Alarm Count
Receive Sa4 Byte Buffer
LCV
R
FEBE
R
FEBE
R
BERR
R
BERR
R
AERR
RSA4
R
R
RSA5
R
Receive Sa5 Byte Buffer
RSA6
R
Receive Sa6 Byte Buffer
RSA7
R
Receive Sa7 Byte Buffer
RSA8
R
Receive Sa8 Byte Buffer
3-4
Conexant
100054E
CONEXANT [ CONEXANT SYSTEMS, INC ]
