3
3.0 Registers
3.1 Address Map
Registers shown with a default setting are reset to the indicated value following power up, software RESET
(CRO; addr 001), GRESET (FCR; addr 080), or hardware reset (RST* pin).
Addresses 000 (hex) to 1FF (hex) are offset by the upper 3 bits of address lines A[11:0] and chip selects as
listed in Tables 3-1 through 3-3.
Table 3-1. Address Offset Map (CX28394)
Offset
Address A[10:0]
(hex)
Chip Select
Framer
CS*
1
2
3
4
0
0
0
0
000
200
400
600
NOTE(S):
1. Global registers at 000 and 080–083 may be accessed at any offsets.
Table 3-2. Address Offset Map (CX28398)
Offset
Address A[11:0]
(hex)
Chip Select
Framer
CS*
1
2
3
4
5
6
7
8
0
0
0
0
0
0
0
0
000
200
400
600
800
A00
C00
E00
NOTE(S):
1. Global registers at 000 and 080–083 may be accessed at any offsets.
100054E
Conexant
3-1
CONEXANT [ CONEXANT SYSTEMS, INC ]
