CX25870/871
Appendix E HDTV Output Mode
Flicker-Free Video Encoder with Ultrascale Technology
E.5 Automatic Trilevel Sync Generation
E.5 Automatic Trilevel Sync Generation
The CX25870/871 will automatically generate an analog synchronization pulse
with three distinct voltage levels for every leading edge it receives at its HSYNC*
input (so long as RASTER_SEL[1:0] = 10 or 11). This trilevel pulse will be
comprised of a –300 mV LOWSYNC level, a +300 mV HIGHSYNC level, and a
0 mV BLANKING level offset by +350 mVDC because the CX25870/871 cannot
output negative voltages. Figure 3, "Analog and Digital Timing Relationships", of
the SMPTE-274M specification, shows a very detailed diagram of the trilevel
sync and start of a line in 1080i mode. Figure 11 of this same SMPTE standard
illustrates the horizontal timing and trilevel sync in more detail.
For those formats which require trilevel syncs, such as 1080i and 720p, the
timing for certain portions of the synchronization pulses differ slightly. For
instance, the amount of time each pulse is at a voltage level of –300 mV
(LOWSYNC) is not the same from one resolution (ATSC format) to another. For
1080i, the time for the LOWSYNC level each line is 44T(44 clock periods =
44*(1/74.25 MHz)= 592.5 ns For 720p, the same interval is 40T periods long
which equates to 40 * (1/74.25 MHz)= 538.7 ns.
In 480p resolution, in accordance with the SMPTE-293M specification, the
CX25870/871 outputs only bilevel analog synchronization pulses.
As Figure 3 "Analog and Digital Timing Relationships" of the SMPTE-274M
and -296M standards show, the period of time for the HIGHSYNC also varies
when moving from 1080i mode to 720p mode. In this first case, the HIGHSYNC
output level will be active for 44 clock periods. For 1080i, 44 clock periods *
(1/74.25 MHz) = 592.6 ns.
In 720p resolution, the HIGHSYNC output signal will be active for 40 clock
periods per output line. For 720p, 40 clock periods * (1/74.25 MHz)= 538.7ns, so
the HIGHSYNC signal will only be active for 538.7 ns per output line.
Due to these discrepancies, the data master will need to program the
CX25870/871’s RASTER_SEL[1:0] bits properly so the encoder knows exactly
which ATSC format it is going to encode. The encoder will then take care of
outputting the proper analog voltage levels (see Figures E-5 through E-9) for the
appropriate amounts of time depending on the resolution.
100381B
Conexant
E-9
CONEXANT [ CONEXANT SYSTEMS, INC ]
