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CMX910L9 参数 Datasheet PDF下载

CMX910L9图片预览
型号: CMX910L9
PDF下载: 下载PDF文件 查看货源
内容描述: [Telecom Circuit, 1-Func, PQFP64, LQFP-64]
分类和应用: 电信电信集成电路
文件页数/大小: 61 页 / 861 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
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AIS Baseband Processor  
CMX910  
5.11  
C-BUS Expansion Port  
The C-BUS expansion port facilitates the connection of the host µC to as many as six additional C-BUS  
compatible devices, while only requiring one additional C-BUS chip select pin. To operate the expansion  
port, the µC writes to the CBUS_Expand register through the CMX910’s normal C-BUS port (SCLK,  
CDATA, CSN) – this can be done even when the CMX910’s internal clocks are disabled. Subsequently,  
for each bit set in bits 5-0 of the CBUS_Expand register, taking the chip select expansion input (CSXN)  
low will cause the associated EXP5N – EXP0N output pin to go low. Each of the EXP5N – EXP0N pins  
can be connected to the (active low) chip-select input of another C-BUS compatible device. Usually only  
one bit in the CBUS_Expand register would be set high at a time. Setting more than one bit high may  
cause simultaneous selection of a number of C-BUS devices; in that case, care must be taken to avoid  
contention if a common RDATA line is used.  
If expansion of the C-BUS is not required, the outputs EXP5N – EXP0N can be used as general purpose  
digital outputs by holding CSXN low and writing the required data pattern to the CBUS_Expand register.  
The data will then appear on the EXP5N-EXP0N pins in inverted form.  
CBUS_Expand register: 8-bit write only.  
C-BUS Address $A0  
All bits cleared to 0 on reset.  
This register can be written while the CMX910’s internal clocks are disabled.  
7
6
5
4
3
2
1
0
Bit:  
Reserved, EXP5NEXP4NEXP3NEXP2NEXP1NEXP0N  
set to 00 enab enab enab enab enab enab  
CBUS_Expand register b5-0: EXP5N – EXP0N Expansion Bus Enable  
Each bit that is set to 1 causes the corresponding EXP5N – EXP0N output pin to be driven low  
when the CSXN input pin is driven low. Bits that are set to 0 cause the corresponding EXP5N –  
EXP0N output pin to be held high.  
© 2009 CML Microsystems Plc  
49  
D/910/6  
 
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