Marine VHF Audio and Signalling Processor
CMX885
Table 7 RAMDAC Values
Default RAMDAC Contents After Reset (hex)
0
000
16
1
001
17
2
003
18
3
006
19
4
00A
20
5
010
21
6
017
22
7
01F
23
8
028
24
9
033
25
10
03E
26
11
04B
27
12
059
28
13
068
29
14
078
30
15
089
31
09A
32
20C
0AD 0C1
0D5
35
258
0EA
36
271
100
37
28A
116
38
2A2
12D
39
2BA
145
40
2D2
15D
41
2E9
175
42
2FF
58
18E
43
315
59
1A7
44
32A
60
1C0
45
33E
61
1D9
46
352
62
1F3
47
365
63
33
226
49
34
23F
50
48
51
52
53
54
55
56
57
376
387
397
3A6
3B4
3C1 3CC 3D7
3E0
3E8
3EF
3F5
3F9
3FC
3FE
3FF
8.2.5 Program Block 4 – Gain and Offset Setup
Bit:
P4.0
P4.1
P4.2
P4.3
P4.4
P4.5
P4.6
P4.7
P4.8
P4.9
P4.10
P4.11
15
1
0
0
0
0
0
0
0
0
0
0
0
14
0
0
0
0
0
0
0
0
0
0
0
0
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Fine Input Gain 1
Fine Input Gain 2
Fine Output Gain 1
Fine Output Gain 2
Output 1 Offset Control
Output 2 Offset Control
Ramp Rate Control
Limiter Setting
Scrambler Inversion Frequency
Audio Filter Sequence
reserved
Input AGC Threshold Level
Default values:
P4.0 $8000
P4.1 $0000
P4.2 $0000
P4.3 $0000
P4.4 $0000
P4.5 $0000
P4.6
P4.7
P4.8
P4.9
P4.10
P4.11
$0000
$3FFF
$119A
$001B
$0608
$0FFF
© 2010 CML Microsystems Plc
54
D/885/3
CMLMICRO [ CML MICROCIRCUITS ]
