Marine VHF Audio and Signalling Processor
CMX885
8.1.28 Interrupt Mask – $CE write
15
14
13
12
11
10
0
9
Aux
8
7
6
5
0
4
0
3
2
0
1
0
Aux Data Data
IRQ NWR
0
DTMF
0
ADC2 ADC1 End RDY
DSC
0
PRG
Bit
15
Value Function
Enable selected interrupts
1
0
1
0
0
1
0
0
0
1
0
1
0
1
0
1
0
0
0
1
0
0
0
1
Disable all interrupts (IRQN pin not activated)
14
Enable NWR detection
Disabled
13
12
reserved
Enable interrupt when a valid DTMF tone is detected
Disabled
reserved
reserved
11
10
9
Enable interrupt when the Aux ADC 2 status bit changes
Disabled
8
7
6
Enable interrupt when the Aux ADC 1 status bit changes
Disabled
Enable interrupt when DSC data transmission has ended
Disabled
Enable interrupt when a DSC data transfer is required
Disabled
5
4
3
reserved
reserved
Enable interrupt when valid DSC data is detected
Disabled
reserved
reserved
2
1
0
Enable interrupt when Prog Flag bit of the Status register changes from 0 to 1
(see Programming register $C8)
0
Disabled
8.1.29 Reserved – $CF write
This C-BUS address is allocated for production testing and must not be accessed in normal operation.
© 2010 CML Microsystems Plc
50
D/885/3
CMLMICRO [ CML MICROCIRCUITS ]
