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CMX885L4 参数 Datasheet PDF下载

CMX885L4图片预览
型号: CMX885L4
PDF下载: 下载PDF文件 查看货源
内容描述: [Consumer Circuit, PQFP48, LQFP-48]
分类和应用: 商用集成电路
文件页数/大小: 69 页 / 1661 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
 浏览型号CMX885L4的Datasheet PDF文件第42页浏览型号CMX885L4的Datasheet PDF文件第43页浏览型号CMX885L4的Datasheet PDF文件第44页浏览型号CMX885L4的Datasheet PDF文件第45页浏览型号CMX885L4的Datasheet PDF文件第47页浏览型号CMX885L4的Datasheet PDF文件第48页浏览型号CMX885L4的Datasheet PDF文件第49页浏览型号CMX885L4的Datasheet PDF文件第50页  
Marine VHF Audio and Signalling Processor  
CMX885  
8.1.23 Modem Configuration – $C7 write  
15  
14  
13  
12  
En  
NWR  
11  
10  
9
Last  
Tx  
8
0
7
0
6
0
5
0
4
0
3
0
2
1
0
0
En  
En  
User  
Bit  
SynC SynD SynT Data DSC RAW Data  
0
This register configures the way the CMX885 handles DSC data in Tx and Rx modes.  
b15 SynC detect  
b14 SynD detect  
b13 SynT detect  
0 = off  
0 = off  
0 = off  
1 = enabled  
1 = enabled  
1 = enabled  
note: SynC, SynD and SynT patterns are defined in Program Blocks P0.0-3  
b12 En_NWR_data 0 = disabled 1 = enabled  
The En_NWR_data bit is required to disable the NWR SAME data decoder at the end of a data  
frame. The decoder will detect and respond to the arrival of a sync signal (if $C1:b12 is set to  
1), and report any following data, however the host will need to decode the data from the  
CMX885, recognise the end of data and then disable the SAME decoder through this bit.  
Setting this bit to 1 will disable the sync search and output data immediately.  
b11 En_DSC data mode  
0 = disabled  
1 = enabled  
Setting this bit selects DSC modem operation. The Modem Enable bit $C1:b2 will start/stop the  
modem.  
b10 En_RAW:  
0 = data packetising on 1 = raw data mode  
This bit selects the raw or formatted (data packetising) mode for DSC data.  
DSC Receive mode:  
b10 = 1: device will look for the programmed Frame Sync. pattern, raise an interrupt (if enabled)  
and decode the following data 16 bits at a time, making them available in Rx Data 1 register  
($C5).  
DSC Transmit mode:  
b10 = 1: device will transmit data 16 bits at a time from Tx Data 1 register ($CA). Bit and frame  
sync pattern generation and all formatting of the data have to be performed by the host in this  
case.  
b9 Last Tx data:  
This is only valid when transmitting data in DSC formatted mode and indicates to the CMX885  
that it can cease modulation. The host must set this bit to 1 immediately after the interrupt for  
‘load more data’ occurs $C6:b6. In receive, or when transmitting other message formats, this  
bit must be cleared to 0.  
b8-3 reserved, clear to 0  
b2 User bit.  
May be freely used by the host in DSC modes. This bit has no effect on the message format or  
encoding and will be reported in the Rx Data 1 register for the receiving host to use as  
appropriate. This bit could be used to indicate a special message, e.g. one containing handset  
or channel set-up information.  
b1-0 reserved, clear to 0  
8.1.24 Programming Register – $C8 write  
15  
14  
13  
12  
11  
10  
9
8
7
6
5
4
3
2
1
0
Program Block Address  
Program Block Data  
See section 8.2 for a definition of program block operation.  
8.1.25 Tx Data 1 – $CA write  
15  
14  
13  
12  
11  
10  
9
8
7
6
5
4
3
2
1
0
Bit:  
$CA  
flag  
DSC Character 0  
flag  
DSC Character 1  
© 2010 CML Microsystems Plc  
46  
D/885/3  
 
 
 
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