欢迎访问ic37.com |
会员登录 免费注册
发布采购

CMX885L4 参数 Datasheet PDF下载

CMX885L4图片预览
型号: CMX885L4
PDF下载: 下载PDF文件 查看货源
内容描述: [Consumer Circuit, PQFP48, LQFP-48]
分类和应用: 商用集成电路
文件页数/大小: 69 页 / 1661 K
品牌: CMLMICRO [ CML MICROCIRCUITS ]
 浏览型号CMX885L4的Datasheet PDF文件第26页浏览型号CMX885L4的Datasheet PDF文件第27页浏览型号CMX885L4的Datasheet PDF文件第28页浏览型号CMX885L4的Datasheet PDF文件第29页浏览型号CMX885L4的Datasheet PDF文件第31页浏览型号CMX885L4的Datasheet PDF文件第32页浏览型号CMX885L4的Datasheet PDF文件第33页浏览型号CMX885L4的Datasheet PDF文件第34页  
Marine VHF Audio and Signalling Processor  
CMX885  
7.10 Auxiliary DAC/RAMDAC Operation  
The four Auxiliary DAC channels are programmed via the AuxDAC Control register, $A8. AuxDAC  
channel 1 may also be programmed to operate as a RAMDAC which will automatically output a pre-  
programmed profile at a programmed rate. The AuxDAC Control register, $A8, with b12 set, controls this  
mode of operation. The default profile is a raised cosine (see Table 7), but this may be over-written with a  
user defined profile by writing to Program Block P3.11. The RAMDAC operation is only available in Tx  
mode and, to avoid glitches in the ramp profile, it is important not to change to Idle or Rx mode whilst the  
RAMDAC is still ramping. The AuxDAC outputs (available on their respective DAC pins) hold the user-  
programmed level during a powersave operation if left enabled, otherwise they will return to zero. Note  
that access to all four AuxDACs is controlled by the AuxDAC Control register, $A8, and therefore to  
update all AuxDACs requires four writes to this register. It is not possible to simultaneously update all four  
AuxDACs.  
See:  
o
AuxDAC Control/Data – $A8 write  
© 2010 CML Microsystems Plc  
30  
D/885/3  
 
 复制成功!