TDMA Digital Radio Processor
CMX7161
Figure 13 Tx Modulation Spectra (4-FSK, 9.6kbps, RRC – 0.2)
7.7
Slot Structure and Frame Synchronisation
A two-slot TDMA structure is supported. Each slot is 30ms in length comprising a 27.5ms data burst with
2.5ms of guard time. Each data burst contains 216 bits of payload data in two 108-bit blocks, with a central
48-bit field which may contain either a frame synchronisation word or embedded signalling data. The entire
contents of each burst (264 bits) are always transferred to/from the host regardless of the contents of the
central field.
2013 CML Microsystems Plc
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CMLMICRO [ CML MICROCIRCUITS ]
