EP9315
Enhanced Universal Platform SOC Processor
Static Memory 32-bit Write on 16-bit External Bus
Parameter
Symbol
tADs
Min
Typ
Max
Unit
tHCLK – 3
-
-
-
-
AD setup to WRn assert time
WRn/DQMn deassert to AD transition time
AD hold from WRn deassert time
CSn hold from WRn deassert time
CSn to WRn assert delay time
WRn assert time
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tADd
tHCLK + 6
-
tADh
tHCLK × 2
-
tCSh
7
-
tWRd
-
-
2
tWRpwL
tWRpwH
tDQMd
tDQMpwL
tDQMpwH
tDAh1
tHCLK × (WST1 + 1)
-
-
(tHCLK × 2) + 14
WRn deassert time
-
-
CSn to DQMn assert delay time
DQMn assert time
-
-
1
tHCLK × (WST1 + 1)
-
-
(tHCLK × 2) + 7
DQMn deassert time
-
tHCLK
-
-
-
-
WRn / DQMn deassert to DA transition time
WRn / DQMn assert to DA valid time
-
tDAV
8
tADs
tADd
tADh
AD
CSn
tCSh
tWRd
tWRpwL
tWRpwL
WRn
tWRpwH
RDn
tDQMd
tDQpwL
tDQpwL
DQMn
tDQpwH
tDAh
tDAV
tDAV
tDAh
DA
WAIT
Figure 11. Static Memory Multiple Word Write 16-bit Cycle Timing Measurement
24
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