EP9315
Enhanced Universal Platform SOC Processor
Static Memory Single Write Wait Cycle
Parameter
Symbol
tWRd
Min
Typ
Max
tHCLK × 4
Unit
tHCLK × 2
WAIT to WRn deassert delay time
CSn assert to WAIT time
-
-
-
-
ns
ns
ns
ns
tWAITd
tWAITpw
tCSnd
tHCLK × (WST1-2)
tHCLK × 510
tHCLK × 5
-
tHCLK × 2
tHCLK × 3
WAIT assert time
WAIT to CSn deassert delay time
AD
CSn
tWRd
WRn
RDn
DQMn
DA
tWAITd
tCSnd
tWAITpw
WAIT
Figure 15. Static Memory Single Write Wait Cycle Timing Measurement
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DS638PP4