EP9315
Enhanced Universal Platform SOC Processor
Static Memory 32-bit Read on 16-bit External Bus
Parameter
Symbol
tADs
Min
Typ
-
Max
Unit
tHCLK
AD setup to CSn assert time
CSn assert to AD transition time
AD transition to CSn deassert time
AD hold from CSn deassert time
RDn assert time
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tADd1
tADd2
tADh
tHCLK × (WST1 + 1)
tHCLK × (WST1 + 2)
-
-
-
tHCLK
-
-
tRDpwL
tRDd
tHCLK × ((2 × WST1) + 3)
-
-
CSn to RDn delay time
-
-
-
-
-
-
-
3
1
-
tDQMd
tDAs1
tDAs2
tDAh1
tDAh2
CSn assert to DQMn assert delay time
DA setup to AD transition time
DA to RDn deassert time
-
15
tHCLK + 12
-
DA hold from AD transition time
DA hold from RDn deassert time
0
0
-
-
tADs
tADd1
tADd2
tADh
AD
CSn
WRn
tRDd
tRDh
tRDpwl
RDn
tDQMh
tDQMd
DQMn
tDAh2
tDAs1
tDAh1
tDAs2
DA
WAIT
Figure 10. Static Memory Multiple Word Read 16-bit Cycle Timing Measurement
DS638PP4
©Copyright 2005 Cirrus Logic (All Rights Reserved)
23
CIRRUS [ CIRRUS LOGIC ]
