EP9315
Enhanced Universal Platform SOC Processor
Static Memory 32-bit Write on 8-bit External Bus
Parameter
Symbol
tADs
Min
Typ
Max
Unit
tHCLK − 3
-
AD setup to WRn assert time
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tADd
tHCLK + 6
WRn/DQMn deassert to AD transition time
AD hold from WRn deassert time
CSn hold from WRn deassert time
CSn to WRn assert delay time
WRn assert time
-
-
tADh
tHCLK × 2
-
-
tCSh
7
-
-
tWRd
-
-
2
tWRpwL
tWRpwH
tDQMd
tDQMpwL
tDQMpwH
tDAh
tHCLK × (WST1 + 1)
tHCLK × 2
-
-
(tHCLK × 2) + 14
WRn deassert time
-
CSn to DQMn assert delay time
DQMn assert time
-
-
1
tHCLK × (WST1 + 1)
-
-
-
(tHCLK × 2) + 7
DQMn deassert time
-
-
tHCLK
WRn / DQMn deassert to DA transition time
WRn / DQMn assert to DA valid time
-
tDAV
-
-
8
tADs
tADd
tADd
tADd
tADh
AD
CSn
tCSh
tWRd
tWRpwL
tWRpwL
tWRpwL
WRn
tWRpwH
tWRpwH
tWRpwH
RDn
tDQMd
tDQMpwL
tDQMpwL
tDQMpwL
DQMn
tDQMpwH
tDQMpwH
tDQMpwH
tDAV
tDAV
tDAV
tDAV
DA
tDAh
tDAh
tDAh
tDAh
WAIT
Figure 9. Static Memory Multiple Word Write 8-bit Cycle Timing Measurement
22
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DS638PP4
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