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CS8900A-IQZ 参数 Datasheet PDF下载

CS8900A-IQZ图片预览
型号: CS8900A-IQZ
PDF下载: 下载PDF文件 查看货源
内容描述: 水晶局域网? ISA以太网控制器 [Crystal LAN ⑩ ISA Ethernet Controller]
分类和应用: 微控制器和处理器串行IO控制器通信控制器外围集成电路PC局域网以太网时钟
文件页数/大小: 138 页 / 2374 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS8900A  
Crystal LAN™ Ethernet Controller  
tire packet has been received, the MAC vali-  
times. If no collision is detected, the SQEerror  
dates the FCS. If an error is detected, the bit (Register 8, TxEvent, Bit 7) is set. If the  
CRCerror bit (Register 4, RxEvent, Bit C) is  
set.  
SQEerroriE bit is set (Register 7, TxCFG, Bit  
7), the host is interrupted. An SQE error may  
indicate a fault on the AUI cable or a faulty  
transceiver (it is assumed that the attached  
transceiver supports this function).  
3.9.2.3 Enforcing Minimum Frame Size  
The MAC provides minimum frame size en-  
forcement of both transmit and receive pack-  
ets. When the TxPadDis bit (Register 9,  
TxCMD, Bit D) is  
3.9.3.3 Out-of-Window (Late) Collision  
If a collision is detected after the first 512 bits  
have been transmitted, the MAC reports a late  
collision by setting the Out-of-window bit (Reg-  
ister 8, TxEvent, Bit 9). The MAC then forces a  
bad CRC and terminates the transmission. If  
the Out-of-windowiE bit (Register 7, TxCFG,  
Bit 9) is set, the host is interrupted. A late col-  
lision may indicate an illegal network configu-  
ration.  
clear, transmit frames will be padded with ad-  
ditional bits to ensure that the receiving station  
receives a legal frame (64 bytes, including  
CRC). When TxPadDis is set, the CS8900A  
will not add pad bits and will transmit frames  
less that 64 bytes. If a frame is received that is  
less than 64 bytes (including CRC), the Runt  
bit (Register 4, RxEvent, Bit D) will be set indi-  
cating the arrival of an illegal frame.  
3.9.3.4 Jabber Error  
If a transmission continues longer than about  
26 ms, the MAC disables the transmitter and  
sets the Jabber bit (Register 8, TxEvent, Bit A).  
The output of the transmitter returns to idle and  
remains there until the host issues a new  
Transmit Command. If the JabberiE bit (Regis-  
ter 7, TxCFG, Bit A) is set, the host is interrupt-  
ed. A Jabber condition indicates that there  
may be something wrong with the CS8900A  
transmit function. To prevent possible network  
faults, the host should clear the transmit buff-  
er. Possible options include:  
3.9.3 Transmit Error Detection and Han-  
dling  
The MAC engine monitors Ethernet activity  
and reports and recovers from a number of er-  
ror conditions. For transmission, the MAC re-  
ports the following errors in the TxEvent  
register (Register 8) and BufEvent register  
(Register C):  
3.9.3.1 Loss of Carrier  
Whenever the CS8900A is transmitting on the  
AUI port, it expects to see its own transmission  
“looped back” to its receiver. If it is unable to  
monitor its transmission after the end of the  
preamble, the MAC reports a loss-of-carrier  
error by setting the Loss-of-CRS bit (Register  
8, TxEvent, Bit 6). If the Loss-of-CRSiE bit  
(Register 7, TxCFG, Bit 6) is set, the host will  
be interrupted.  
Reset the chip with either software or hard-  
ware reset (see Section 3.3 on page 19).  
Issue a Force Transmit Command by setting  
the Force bit (Register 9, TxCMD, bit 8).  
Issue a Transmit Command with the TxLength  
field set to zero.  
3.9.3.2 SQE Error  
3.9.3.5 Transmit Collision  
After the end of transmission on the AUI port,  
the MAC expects to see a collision within 64 bit  
The MAC counts the number of times an indi-  
vidual packet must be retransmitted due to  
CIRRUS LOGIC PRODUCT DATASHEET  
DS271F4  
31  
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