CS8900A
Crystal LAN™ ISA Ethernet Controller
In the interrupt service routine, the BufEvent regis- During the frame processing, the software should
ter (register C), bit RxDMA Frame (bit 7) indicates
that one or more receive frames were transferred
using DMA. The software driver should maintain a
pointer (e.g. PDMA_START) that will point to the
beginning of a new frame. After the CS8900A is
initialized and before any frame is received, pointer
PDMA_START points to the beginning of the
DMA buffer memory area. The first read of the
advance the PDMA_START pointer. At the end of
processing a frame, pointer PDMA_START
should be made to align with a double-word bound-
ary. The software remains in the loop until the
DMA frame count read is zero.
5.5 Auto-Switch DMA
5.5.1 Overview
DMA Frame Count, CDMA, commits the memory The CS8900A supports a unique feature, Auto-
covered by the CDMA count, and the DMA cannot Switch DMA, that allows it to switch between
overwrite this committed space until the space is Memory or I/O mode and Receive DMA automati-
freed. The driver then processes the frames de- cally. Auto-Switch DMA allows the CS8900A to
scribed by the CDMA count and makes a second
read of the DMA frame count. This second read
frees the buffer memory space described by the
CDMA counter.
realize the performance advantages of Memory or
I/O mode while minimizing the number of missed
frames that could result due to slow processing by
the host.
DMA Buffer
Base Address
RxStatus - Frame 1
RxLength - Frame 1
DMA Byte Count
(PacketPage base + 012Ah)
Frame 1
RxStatus - Frame 2
RxLength - Frame 2
Frame 2
DMA Start of Frame
"Holes" due to
double-word
alignment
register (PacketPage
base + 0126H)
points here.
RxStatus - Frame 3
RxLength - Frame 3
Frame 3
Figure 24. Example of Frames Stored in DMA Buffer
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