CS8900A
Crystal LAN™ ISA Ethernet Controller
Address Erred
Type of Frame?
Received
Passes
Hash
Filter?
Contents of RxEvent
Bits F-A
Bit 9
Bit 8
Bit 6
Hashed RxOK IAHash
Frame
Individual
Address
no
no
yes
no
Hash Table Index
1
0
0
1
0
0
1
1
1
0
1
1
0
1
1
0
0
0
0
0
0
ExtraData Runt CRC Error Broadcast Individual Adr
yes
no
don’t care ExtraData Runt CRC Error Broadcast Individual Adr
Multicast
Address
yes
no
Hash table index
no
ExtraData Runt CRC Error Broadcast Individual Adr
yes
no
don’t care ExtraData Runt CRC Error Broadcast Individual Adr
Broad-
cast
Address
yes
(Note 6)
ExtraData Runt CRC Error Broadcast Individual Adr
(actual value X00010)
no
yes
ExtraData Runt CRC Error Broadcast Individual Adr
0
1
0
(Note 7)
no
no
ExtraData Runt CRC Error Broadcast Individual Adr
0
0
1
0
0
0
yes
don’t care ExtraData Runt CRC Error Broadcast Individual Adr
Notes: 6. Broadcast frames are accepted as Multicast frames if and only if all the following conditions are met
simultaneously:
a) the Logical Address Filter is programmed as: (MSB) 0000 8000 0000 0000h (LSB). Note that this
LAF value corresponds to a Multicast Addresses of both all 1s and 03-00-00-00-00-01.
b) the Rx Control Register (register 5) is programmed to accept IndividualA, MulticastA, RxOK-only,
and the following address filters were enabled: IAHashA and BroadcastA.
7. NOT (Note 1).
Table 25. Contents of RxEvent Upon Various Conditions
5.4 Receive DMA
5.4.2 Configuring the CS8900A for DMA Opera-
tion
5.4.1 Overview
The CS8900A interfaces to the host DMA control-
ler through one pair of the DMA request/acknowl-
edge pins (see Section 3.2 on page 18 for a
description of the CS8900A’s DMA interface).
The CS8900A supports a direct interface to the host
DMA controller allowing it to transfer receive
frames to host memory via slave DMA. The DMA
option applies only to receive frames, and not
transmit operation. The CS8900A offers three pos-
sible Receive DMA modes:
Four 16-bit registers are used for DMA operation.
These are described in Table 26.
Receive-DMA-only mode is enabled by setting the
RxDMAonly bit (Register 3, RxCFG, Bit 9).
1) Receive-DMA-only mode: All receive frames
are transferred via DMA.
Note: If the RxDMAonly bit and the AutoRxD-
MAE bit (Register 3, RxCFG, Bit A) are both set,
then RxDMAonly takes precedence, and the
CS8900A is in DMA mode for all receive frames.
2) Auto-Switch DMA: DMA is used only when
needed to help prevent missed frames.
3) StreamTransfer: DMA is used to minimize the
number of interrupts to the host.
5.4.3 DMA Receive Buffer Size
This section provides a description of Receive-
DMA-only mode. Section 5.5 on page 93 describes
Auto-Switch DMA and Section 5.6 on page 96 de-
scribes StreamTransfer.
In receive DMA mode, the CS8900A stores re-
ceived frames (along with their status and length)
in a circular buffer located in host memory space.
CIRRUS LOGIC PRODUCT DATA SHEET
90
DS271PP3
CIRRUS [ CIRRUS LOGIC ]
