CS5463
Parameter
Symbol
Min
Typ
Max
Unit
Low-level Input Voltage (VD = 3.3 V)
V
IL
All Pins Except XIN and SCLK and RESET
-
-
-
-
-
-
0.48
0.3
0.2 VD+
V
V
V
XIN
SCLK and RESET
High-level Output Voltage
Low-level Output Voltage
Input Leakage Current
I
= +5 mA
= -5 mA
V
(VD+) - 1.0
-
-
-
V
out
OH
I
V
I
-
-
-
-
0.4
±10
±10
-
V
out
OL
±1
-
µA
µA
pF
in
3-state Leakage Current
Digital Output Pin Capacitance
I
OZ
C
5
out
Notes: 10. All measurements performed under static conditions.
11. If a crystal is used, then XIN frequency must remain between 2.5 MHz - 5.0 MHz. If an external
oscillator is used, XIN frequency range is 2.5 MHz - 20 MHz, but K must be set so that MCLK is between
2.5 MHz - 5.0 MHz.
12. If external MCLK is used, then the duty cycle must be between 45% and 55% to maintain this
specification.
13. The frequency of CPUCLK is equal to MCLK.
14. The minimum FSCR is limited by the maximum allowed gain register value. The maximum FSCR is
limited by the full-scale signal applied to the channel input.
15. Configuration Register bits PC[6:0] are set to “0000000”.
10
DS678PP1
CIRRUS [ CIRRUS LOGIC ]
