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CS5463-ISZ 参数 Datasheet PDF下载

CS5463-ISZ图片预览
型号: CS5463-ISZ
PDF下载: 下载PDF文件 查看货源
内容描述: 单相,双向功率/能量集成电路 [Single Phase, Bi-directional Power/Energy IC]
分类和应用:
文件页数/大小: 44 页 / 878 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS5463  
2. PIN DESCRIPTION  
Crystal Out  
XOUT  
CPUCLK  
VD+  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
XIN  
SDI  
Crystal In  
CPU Clock Output  
Positive Digital Supply  
Digital Ground  
Serial Data Input  
Energy Output 2  
Energy Output 1  
Interrupt  
E2  
E1  
INT  
RESET  
E3  
PFMON  
IIN+  
IIN-  
VA+  
AGND  
DGND  
SCLK  
SDO  
CS  
MODE  
VIN+  
Serial Clock  
Serial Data Ouput  
Chip Select  
Reset  
High Frequency Energy Output  
Power Fail Monitor  
Differential Current Input  
Differential Current Input  
Positive Analog Supply  
Analog Ground  
Mode Select  
Differential Voltage Input  
Differential Voltage Input  
Voltage Reference Output VREFOUT  
Voltage Reference Input VREFIN  
9
VIN-  
10  
11  
12  
Clock Generator  
XOUT, XIN - The output and input of an inverting amplifier. Oscillation occurs when connected to  
a crystal, providing an on-chip system clock. Alternatively, an external clock can be supplied to  
the XIN pin to provide the system clock for the device.  
Crystal Out  
Crystal In  
1,24  
CPUCLK - Output of on-chip oscillator which can drive one standard CMOS load.  
CPU Clock Output  
2
5
Control Pins and Serial Data I/O  
Serial Clock Input  
SCLK - A Schmitt-Trigger input pin. Clocks data from the SDI pin into the receive buffer and out  
of the transmit buffer onto the SDO pin when CS is low.  
SDO -Serial port data output pin.SDO is forced into a high-impedance state when CS is high.  
CS - Low, activates the serial port interface.  
Serial Data Output  
Chip Select  
6
7
8
MODE - High, enables the “auto-boot” mode. The mode pin has an internal pull-down resistor.  
Mode Select  
E3, E1, E2 - Active-low pulses with an output frequency proportional to the selected power. Con-  
figurable outputs for active, apparent, and reactive power, negative energy indication, zero cross  
detection, and power failure monitoring. E1, E2, E3 outputs are configured in the Operational  
Modes Register.  
Energy Output  
18,21,22  
RESET - A Schmitt-Trigger input pin. Low activates Reset, all internal registers (some of which  
drive output pins) are set to their default states.  
Reset  
19  
INT - Low, indicates that an enabled event has occurred.  
Interrupt  
20  
23  
SDI - Serial port data input pin. Data will be input at a rate determined by SCLK.  
Serial Data Input  
Analog Inputs/Outputs  
Differential Voltage Inputs  
Differential Current Inputs  
Voltage Reference Output  
VIN+, VIN- - Differential analog input pins for the voltage channel.  
IIN+, IIN- - Differential analog input pins for the current channel.  
9,10  
15,16  
11  
VREFOUT - The on-chip voltage reference output. The voltage reference has a nominal magni-  
tude of 2.5 V and is referenced to the AGND pin on the converter.  
VREFIN - The input to this pin establishes the voltage reference for the on-chip modulator.  
Voltage Reference Input  
Power Supply Connections  
Positive Digital Supply  
Digital Ground  
12  
VD+ - The positive digital supply.  
DGND - Digital Ground.  
3
4
VA+ - The positive analog supply.  
AGND - Analog ground.  
Positive Analog Supply  
Analog Ground  
14  
13  
17  
PFMON - The power fail monitor pin monitors the analog supply. If the analog supply does not  
meet or falls below PFMON’s voltage threshold, a Low-supply Detect (LSD) event is set in the  
status register.  
Power Fail Monitor  
6
DS678PP1  
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