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CS5463-ISZ 参数 Datasheet PDF下载

CS5463-ISZ图片预览
型号: CS5463-ISZ
PDF下载: 下载PDF文件 查看货源
内容描述: 单相,双向功率/能量集成电路 [Single Phase, Bi-directional Power/Energy IC]
分类和应用:
文件页数/大小: 44 页 / 878 K
品牌: CIRRUS [ CIRRUS LOGIC ]
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CS5463  
VOLTAGE REFERENCE  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Reference Output  
Output Voltage  
VREFOUT  
+2.4  
-
+2.5  
25  
+2.6  
60  
V
Temperature Coefficient  
(Note 8) TC  
ppm/°C  
VREF  
Load Regulation  
(Note 9)  
V  
-
6
10  
mV  
R
Reference Input  
Input Voltage Range  
Input Capacitance  
Input CVF Current  
VREFIN  
+2.4  
+2.5  
4
+2.6  
V
-
-
-
-
pF  
nA  
25  
Notes: 8. The voltage at VREFOUT is measured across the temperature range. From these measurements the  
following formula is used to calculate the VREFOUT Temperature Coefficient:.  
(
(
(
1.0 x 106  
(VREFOUTMAX - VREFOUTMIN)  
VREFOUTAVG  
1
TCVREF  
=
(
(
(
TAMAX - TAMIN  
9. Specified at maximum recommended output of 1 µA, source or sink.  
DIGITAL CHARACTERISTICS  
Min / Max characteristics and specifications are guaranteed over all Operating Conditions.  
Typical characteristics and specifications are measured at nominal supply voltages and TA = 25 °C.  
VA+ = VD+ = 5V ±5%; AGND = DGND = 0 V. All voltages with respect to 0 V.  
MCLK = 4.096 MHz.  
Parameter  
Master Clock Characteristics  
Symbol  
Min  
Typ  
Max  
Unit  
Master Clock Frequency Internal Gate Oscillator (Note 11) MCLK  
Master Clock Duty Cycle  
2.5  
40  
40  
4.096  
20  
60  
60  
MHz  
%
-
-
CPUCLK Duty Cycle  
(Note 12 and 13)  
%
Filter Characteristics  
Phase Compensation Range  
Input Sampling Rate  
(Voltage Channel, 60 Hz)  
DCLK = MCLK/K  
-2.8  
-
+2.8  
°
Hz  
-
-
DCLK/8  
-
Digital Filter Output Word Rate  
High-pass Filter Corner Frequency  
(Both Channels) OWR  
-3 dB  
DCLK/1024  
-
-
Hz  
-
0.5  
-
Hz  
Full-scale DC Calibration Range (Referred to Input) (Note 14) FSCR  
25  
100  
%F.S.  
µs  
Channel-to-channel Time-shift Error  
Input/Output Characteristics  
High-level Input Voltage  
(Note 15)  
1.0  
V
IH  
All Pins Except XIN and SCLK and RESET  
0.6 VD+  
(VD+) - 0.5  
0.8 VD+  
-
-
-
-
-
-
V
V
V
XIN  
SCLK and RESET  
Low-level Input Voltage (VD = 5 V)  
V
IL  
All Pins Except XIN and SCLK and RESET  
-
-
-
-
-
-
0.8  
1.5  
0.2 VD+  
V
V
V
XIN  
SCLK and RESET  
DS678PP1  
9
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