ELECTRICAL SPECIFICATIONS
T
A
=T
MIN
to T
MAX
, AV
DD
=DV
DD
=+5.0 V, OV
DD
= 3.3 V, ƒ
S
=5 MSPS, 2.5 V
PP
input span, Gain=0 dB, R
EXT
=1.43 kΩ, unless
otherwise specified.
PARAMETERS
Dynamic Performance
1
Effective Number of Bits
ƒ
IN
= 60 kHz
ƒ
IN
= 900 kHz
Signal-to-Noise Ratio
(without Harmonics)
ƒ
IN
= 75 kHz
ƒ
IN
= 900 kHz
Harmonic Distortion
ƒ
IN
= 60 kHz
ƒ
IN
= 900 kHz
Signal-to-Noise and Distortion
(SINAD)
ƒ
IN
= 60 kHz
ƒ
IN
= 900 kHz
Spurious Free Dynamic Range
3
ƒ
IN
= 60 kHz
ƒ
IN
= 900 kHz
ƒ
IN
= 2 MHz
ƒ
IN
= 3 MHz
Two-Tone Intermodulation
3rd Order Distortion
Inputs
GS0–GS2 Logic 1 Voltage
GS0–GS2 Logic 0 Voltage
CLK,
RS
Logic 1 Voltage
CLK,
RS
Logic 0 Voltage
Maximum Input Current Low
Maximum Input Current High
Input Capacitance
Digital Outputs
Logic 1 Voltage
Logic 0 Voltage
CLK to Output Delay Time (t
D
)
Power Supply Requirements
Voltages
OV
DD
AV
DD
DV
DD
Currents
I
DD
Power Dissipation
1
2
3
TEST
CONDITIONS
ADC Input = –1 dBFS
2
TEST
LEVEL
MIN
SPT8100
TYP
MAX
UNITS
IV
V
ADC Input = –1 dBFS
2
IV
V
ADC Input = –0.5 dBFS
IV
V
ADC Input = –1 dBFS
IV
V
ADC Input = –0.5 dB
R
EXT
= 1 kΩ @ 10 MSPS
R
EXT
= 1 kΩ @ 10 MSPS
ƒ
1
=400 kHz, ƒ
2
=410 kHz
4
ƒ
1
=890 kHz, ƒ
2
=900 kHz
5
IV
V
V
V
V
V
VI
VI
VI
VI
VI
VI
V
I
OH
= –2 mA
I
OL
= 2 mA
C
LOAD
= 20 pF
VI
VI
IV
IV
IV
IV
VI
VI
4
12.2
13.0
12.7
81
80
–92
–82
–84
Bits
Bits
dB
dB
dB
dB
dB
dB
dBc
dBc
dBc
dBc
dB
dB
V
V
V
V
µA
µA
pF
V
V
ns
V
V
V
mA
mW
78
75
85
80
78
94
94
83
78
–94
–89
2.4
0.8
2.0
–10
–10
5
OV
DD
– 0.5
0.4
30
3.0
4.75
4.75
3.3
5.0
5.0
93
465
5.25
5.25
5.25
103
515
0.8
+10
+10
Dynamic performance tested at ƒ
S
=4.4 MSPS
0 dBFS is 5.0 V peak-to-peak differential
ADC Input = –8.1 dBFS, unless otherwise noted
Test Conditions: PGA setting of 5.8 dB; Analog Input at ADC = –0.7 dB
5
Test Conditions: PGA setting of 0 dB; Analog Input at ADC = –1.9 dB
TEST LEVEL CODES
All electrical characteristics are subject
to the following conditions:
All parameters having min/max specifi-
cations are guaranteed. The Test Level
column indicates the specific device
testing actually performed during
production and Quality Assurance
inspection. Any blank section in the data
column indicates that the specification is
not tested at the specified condition.
TEST LEVEL
I
II
III
IV
V
VI
TEST PROCEDURE
100% production tested at the specified temperature.
100% production tested at T
A
= +25 °C, and sample tested at the
specified temperatures.
QA sample tested only at the specified temperatures.
Parameter is guaranteed (but not tested) by design and characteriza-
tion data.
Parameter is a typical value for information purposes only.
100% production tested at T
A
= +25 °C. Parameter is guaranteed
over specified temperature range.
SPT8100
3
1/9/02
CADEKA [ CADEKA MICROCIRCUITS LLC. ]
