Data Sheet
Pin Assignments (Continued)
Pin No.
26
27
28
29
30
31
32
33
34
35
36
37
38
39
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
59
Pin Name
NC
Description
No Connect
NC
No Connect
NC
No Connect
D1_0
D1_1
D1_2
D1_3
D1_4
D1_5
D1_6
D1_7
D1_8
D1_9
ORNG_1
CLK_EXT
NC
Output Data Channel 1 (LSB)
Output Data Channel 1
Output Data Channel 1
Output Data Channel 1
Output Data Channel 1
Output Data Channel 1
Output Data Channel 1
Output Data Channel 1
Output Data Channel 1
Output Data Channel 1 (MSB)
Out of Range flag Channel 1. High when input signal is out of range
Output clock signal for data synchronization. CMOS levels.
No Connect
NC
No Connect
NC
No Connect
D0_0
D0_1
D0_2
D0_3
D0_4
D0_5
D0_6
D0_7
D0_8
D0_9
ORNG_0
OE_N_0
Output Data Channel 0
Output Data Channel 0
Output Data Channel 0
Output Data Channel 0
Output Data Channel 0
Output Data Channel 0
Output Data Channel 0
Output Data Channel 0
Output Data Channel 0
Output Data Channel 0 (MSB)
Out of Range flag Channel 0. High when input signal is out of range.
Output Enable Channel 0. Tristate when low.
Bias control bits for the buffer driving pin CM_EXT
00: Off
10: 500uA
CM_EXTBC_1,
CM_EXTBC_0
01: 50uA
11: 1mA
60, 61
62, 63
Sleep Mode
00: Sleep Mode
10: Channel 1 active
SLP_N_1,
SLP_N_0
01: Channel 0 active
11: Both channels active
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