ꢐ ꢕꢙ ꢚꢋ ꢛꢛ
ꢐ ꢕꢙ ꢚꢋ ꢛꢜ
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SBAS288D − JUNE 2003 − REVISED AUGUST 2004
Table 14gives the effective overall throughput (1/t19) when
cycling the input multiplexer. The values for throughput
(1/t19) assume the multiplexer was changed with a 3-byte
WREG command and fSCLK = fCLKIN/4.
Settling Time Using the Input Multiplexer
The most efficient way to cycle through the inputs is to
change the multiplexer setting (using a WREG command
to the multiplexer register MUX) immediately after DRDY
goes low. Then, after changing the multiplexer, restart the
conversion process by issuing the SYNC and WAKEUP
commands, and retrieve the data with the RDATA
command. Changing the multiplexer before reading the
data allows the ADS1256 to start measuring the new input
channel sooner. Figure 19 demonstrates efficient input
cycling. There is no need to ignore or discard data while
cycling through the channels of the input multiplexer
because the ADS1256 fully settles before DRDY goes low,
indicating data is ready.
Table 14. Multiplexer Cycling Throughput
DATA RATE
(SPS)
CYCLING THROUGHPUT (1/t
)
19
(Hz)
30,000
15,000
7500
3750
2000
1000
500
100
60
4374
3817
3043
2165
1438
837
456
98
Step 1: When DRDY goes low, indicating that data is ready
for retrieval, update the multiplexer register MUX using the
WREG command. For example, setting MUX to 23h gives
AINP = AIN2, AINN = AIN3.
59
Step 2: Restart the conversion process by issuing a SYNC
command immediately followed by a WAKEUP command.
Make sure to follow timing specification t11 between
commands.
50
50
30
30
25
25
15
15
Step 3: Read the data from the previous conversion using
the RDATA command.
10
10
5
5
Step 4: When DRDY goes low again, repeat the cycle by
first updating the multiplexer register, then reading the
previous data.
2.5
2.5
NOTE: f
CLKIN
= 7.68MHz.
t
t
19
18
DRDY
WREG 45h
to MUX reg
WREG 23h
to MUX reg
DIN
SYNC
WAKEUP
RDATA
SYNC
WAKEUP
RDATA
Data from
Data from
DOUT
MUX = 01h
MUX = 23h
23h
AIN = AIN2, AIN = AIN3
45h
AIN = AIN4, AIN = AIN5
01h
AIN = AIN0, AIN = AIN
1
MUX
Register
P
N
P
N
P
N
Figure 19. Cycling the ADS1256 Input Multiplexer
21
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