ꢐ ꢕꢙ ꢚꢋ ꢛꢛ
ꢐ ꢕꢙ ꢚꢋ ꢛꢜ
www.ti.com
SBAS288D − JUNE 2003 − REVISED AUGUST 2004
The charging of the input capacitors draws a transient
current from the sensor driving the ADS1255/6 inputs. The
average value of this current can be used to calculate an
VREFP
VREFN
effective impedance ZEFF where ZEFF = VIN / IAVERAGE
Figure 11 shows the input circuitry with the capacitors and
switches of Figure 9 replaced by their effective
impedances. These impedances scale inversely with the
CLKIN frequency. For example, if fCLKIN is reduced by a
factor of two, the impedances will double. They also
change with the PGA setting. Table 10 lists the effective
impedances with the buffer off for fCLKIN = 7.68MHz.
.
AVDD
AVDD
ESD
Protection
Self Gain
Calibration
(1)
Ω
ZEFF = 18.5k
AINP AINN
AVDD/2
AIN0
AIN1
τ
τ
τ
ZeffA
ZeffB
ZeffA
=
=
=
SAMPLE/CA
SAMPLE/CB
SAMPLE/CA
AIN2
AIN3
AINP
AINN
(1) fCLKIN = 7.68MHz
Input
Multiplexer
AIN4
AIN5
AIN6
AIN7
Figure 12. Simplified Reference Input Circuitry
AINCOM
AVDD/2
ESD diodes protect the reference inputs. To keep these
diodes from turning on, make sure the voltages on the
reference pins do not go below AGND by more than
100mV, and likewise do not exceed AVDD by 100mV:
Figure 11. Analog Input Effective Impedances
with Buffer Off
−100mV < (VREFP or VREFN) < AVDD + 100mV
Table 10. Analog Input Impedances with Buffer Off
During self gain calibration, all the switches in the input
multiplexer are opened, VREFN is internally connected to
AINN, and VREFP is connected to AINP. The input buffer
may be disabled or enabled during calibration. When the
buffer is disabled, the reference pins will be driving the
circuitry shown in Figure 9 during self gain calibration,
resulting in increased loading. To prevent this additional
loading from introducing gain errors, make sure the
circuitry driving the reference pins has adequate drive
capability. When the buffer is enabled, the loading on the
reference pins will be much less, but the buffer will limit the
allowable voltage range on VREFP and VREFN during
self or self gain calibration as the reference pins must
remain within the specified input range of the buffer in
order to establish proper gain calibration.
PGA
SETTING
Zeff
Zeff
B
A
(kΩ)
260
130
65
33
16
8
(kΩ)
220
110
55
28
14
7
1
2
4
8
16
32
64
8
7
NOTE: f
CLKIN
= 7.68MHz.
VOLTAGE REFERENCE INPUTS (VREFP, VREFN)
The voltage reference for the ADS1255/6 A/D converter is
the differential voltage between VREFP and VREFN:
VREF = VREFP − VREFN. The reference inputs use a
structure similar to that of the analog inputs with the
circuitry on the reference inputs of Figure 12. The load
presented by the switched capacitor can be modeled with
A high-quality reference voltage is essential for achieving
the best performance from the ADS1255/6. Noise and drift
on the reference degrade overall system performance. It
is especially critical that special care be given to the
circuitry generating the reference voltages and their layout
when operating in the low-noise settings (that is, with low
data rates) to prevent the voltage reference from limiting
performance.
an effective impedance (ZEFF
)
of 18.5kΩ for
fCLKIN = 7.68MHz. The temperature coefficient of the
effective impedance of the voltage reference inputs is
approximately 35ppm/°C.
17
BB [ BURR-BROWN CORPORATION ]
