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ADS1255IDB 参数 Datasheet PDF下载

ADS1255IDB图片预览
型号: ADS1255IDB
PDF下载: 下载PDF文件 查看货源
内容描述: 极低噪声, 24位模拟数字转换器 [Very Low Noise, 24-Bit Analog-to-Digital Converter]
分类和应用: 转换器
文件页数/大小: 39 页 / 422 K
品牌: BB [ BURR-BROWN CORPORATION ]
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ꢐꢕ ꢙꢚ ꢋ ꢛ ꢛ  
ꢐꢕ ꢙꢚ ꢋ ꢛ ꢜ  
www.ti.com  
SBAS288D − JUNE 2003 − REVISED AUGUST 2004  
Table 11 shows the averaging and corresponding data rate  
for each of the 16 valid DRATE register settings when  
fCLKIN = 7.68MHz. Note that the data rate scales directly  
with the CLKIN frequency. For example, reducing fCLKIN  
from 7.68MHz to 3.84MHz reduces the data rate for  
DR[7:0] = 11110000 from 30,000SPS to 15,000SPS.  
DIGITAL FILTER  
The programmable low-pass digital filter receives the  
modulator output and produces a high-resolution digital  
output. By adjusting the amount of filtering, tradeoffs can  
be made between resolution and data rate: filter more for  
higher resolution, filter less for higher data rate. The filter  
is comprised of two sections, a fixed filter followed by a  
programmable filter. Figure 13 shows the block diagram of  
the analog modulator and digital filter. Data is supplied to  
the filter from the analog modulator at a rate of fCLKIN/4.  
The fixed filter is a 5th-order sinc filter with a decimation  
value of 64 that outputs data at a rate of fCLKIN/256. The  
second stage of the filter is a programmable averager  
(1st-order sinc filter) with the number of averages set by  
the DRATE register. The data rate is a function of the  
number of averages (Num_Ave) and is given by  
Equation 1.  
Table 11. Number of Averages and Data Rate for  
Each Valid DRATE Register Setting  
NUMBER OF AVERAGES FOR  
(1)  
DRATE  
DR[7:0]  
DATA RATE  
(SPS)  
PROGRAMMABLE FILTER  
(Num_Ave)  
11110000  
11100000  
11010000  
11000000  
10110000  
10100001  
10010010  
10000010  
01110010  
01100011  
01010011  
01000011  
00110011  
00100011  
00010011  
00000011  
1 (averager bypassed)  
30,000  
15,000  
7500  
3750  
2000  
1000  
500  
100  
60  
2
4
8
15  
fCLKIN  
Data Rate + ǒ Ǔǒ  
256  
1
Ǔ
30  
60  
Num_Ave  
(1)  
300  
500  
Modulator Rate =  
/4  
f
600  
50  
f
CLKIN  
1
CLKIN  
256  
ǒ
Ǔ
+ ǒ Ǔ  
f
DataRate  
CLKIN  
DataRate +  
256  
Num_Ave  
1000  
30  
1200  
25  
5
Analog  
Modulator  
sinc  
Programmable  
Averager  
2000  
15  
Filter  
3000  
10  
6000  
5
Num_Ave  
12,000  
= 7.68MHz.  
2.5  
(set by DRATE)  
(1)  
for f  
CLKIN  
Digital Filter  
Figure 13. Block Diagram of the Analog  
Modulator and Digital Filter  
18  
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