t16
DRDY
SCLK
SDIO
t18
t17
IN7
IN7
IN7
IN1
IN1
IN1
IN0
INM
IN1
IN0
Write Register Data
SDIO
IN0
OUTM
OUT1 OUT0
Read Register Data using SDIO
SDIO
IN0
SDOUT
OUTM
OUT1 OUT0
Read Register Data using SDOUT
FIGURE 16. Serial Interface Timing (CS LOW), Master Mode.
t38
DRDY
t20
t19
SCLK
t36
SDIO
SDIO
IN7
IN7
IN1
IN1
IN0
INM
IN1
IN0
IN7
IN7
Write Register Data
IN0
OUTM
OUT1 OUT0
Read Register Data using SDIO
SDIO
IN7
IN1
IN0
IN7
SDOUT
OUTM
OUT1 OUT0
Read Register Data using SDOUT
FIGURE 17. Serial Interface Timing (CS LOW), Slave Mode.
DRDY
t18
t21
CS
t22
t17
t23
SCLK
IN7
IN7
IN7
IN1
IN1
IN0
INM
IN1
IN0
SDIO
SDIO
Write Register Data
IN0
OUTM
OUT1 OUT0
Read Register Data using SDIO
IN1 IN0
SDIO
OUTM
Read Register Data using SDOUT
OUT1 OUT0
SDOUT
DRDY
t16
t18
CS
SCLK
OUTM
Continuous Read of Data Output Register using SDIO
OUTM OUT1 OUT0
Continuous Read of Data Output Register using SDOUT
OUT1 OUT0
SDIO
SDOUT
FIGURE 18. Serial Interface Timing (Using CS), Master Mode.
®
24
ADS1212, 1213