DF (Data Format) Bit—The DF bit controls the format of
the output data, either Two’s Complement or Offset Binary,
as follows:
SDL (Serial Data Line) Bit—The SDL bit controls which
pin on the ADS1212/13 will be used as the serial data output
pin, either SDIO or SDOUT, as follows:
SDL
SERIAL DATA OUTPUT PIN
DF
FORMAT
ANALOG INPUT DIGITAL OUTPUT
0
1
SDIO
SDOUT
Default
0
Two’s
Complement
+Full-Scale
Zero
–Full Scale
7FFFFFH
000000H
800000H
Default
1
Offset Binary
+Full-Scale
Zero
–Full-scale
FFFFFFH
800000H
000000H
If SDL is LOW, then SDIO will be used for both input and
output of serial data—see the Timing section for more
details on how the SDIO pin transitions between these two
states. In addition, SDOUT will remain in a tri-state condi-
tion at all times.
These two formats are the same for all bits except the most
significant, which is simply inverted in one format vs the
other. This bit only applies to the Data Output Register—it
has no effect on the other registers.
Important Note: Since the default condition is SDL LOW,
SDIO has the potential of becoming an output once every
data output cycle if the ADS1212/13 is in the Master Mode.
This will occur until the Command Register can be written
and the SDL bit set HIGH. See the Interfacing section for
more information.
U/B (Unipolar) Bit—The U/B bit controls the limits im-
posed on the output data, as follows:
U/B
MODE
LIMITS
0
1
Bipolar
Unipolar
None
Default
DRDY (Data Ready) Bit—The DRDY bit is a read only bit
which reflects the state of the ADS1212/13’s DRDY output
pin, as follows:
Zero to +Full-Scale only
The particular mode has no effect on the actual full-scale
range of the ADS1212/13, data format, or data format vs
input voltage. In the bipolar mode, the ADS1212/13 oper-
ates normally. In the unipolar mode, the conversion result is
limited to positive values only (zero included).
DRDY
MEANING
Data Ready
0
1
Data Not Ready
DSYNC (Data Synchronization) Bit—The DSYNC bit is
a write only bit which occupies the same location as DRDY.
When a ‘one’ is written to this location, the affect on the
ADS1212/13 is the same as if the DSYNC input pin had
been taken LOW and returned HIGH. That is, the modulator
count for the current conversion cycle will be reset to zero.
This bit only controls what is placed in the Data Output
Register. It has no effect on internal data. When cleared, the
very next conversion will produce a valid bipolar result.
BD (Byte Order) Bit—The BD bit controls the order in
which bytes of data are read, either most significant byte
first or least significant byte, as follows:
DSYNC
MEANING
0
1
No Change in Modulator Count
Modulator Count Reset to Zero
BD
BYTE ACCESS ORDER
0
Most Significant
Default
to Least Significant Byte
The DSYNC bit is provided in order to reduce the number of
interface signals that are needed between the ADS1212/13
and the main controller. Consult “Making Use of DSYNC”
in the Serial Interface section for more information.
1
Least Significant
to Most Significant Byte
Note that when BD is clear and a multi-byte read is initiated,
A3-A0 of the Instruction Register is the address of the most
significant byte and subsequent bytes reside at higher ad-
dresses. If BD is set, then A3-A0 is the address of the least
significant byte and subsequent bytes reside at lower ad-
dresses. The BD bit only affects read operations, it has no
affect on write operations.
MD2-MD0 (Operating Mode) Bits—The MD2-MD0 bits
initiate or enable the various calibration sequences, as follows:
MD2
MD1
MD0
OPERATING MODE
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Normal Mode
Self-Calibration
System Offset Calibration
System Full-Scale Calibration
Pseudo System Calibration
Background Calibration
Sleep
MSB (Bit Order) Bit—The MSB bit controls the order in
which bits within a byte of data are read, either most
significant bit first or least significant bit, as follows:
Reserved
MSB
BIT ORDER
0
1
Most Significant Bit First
Least Significant Bit First
Default
The Normal Mode, Background Calibration Mode, and
Sleep Mode are permanent modes and the ADS1212/13 will
remain in these modes indefinitely. All other modes are
temporary and will revert to Normal Mode once the appro-
priate actions are complete. See the Calibration and Sleep
Mode sections for more information.
The MSB bit only affects read operations, it has no affect on
write operations.
®
20
ADS1212, 1213
BB [ BURR-BROWN CORPORATION ]
