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SBAS282D − JUNE 2003 − REVISED MARCH 2004
absolute values of the minima and maxima are not the
same; the maximum n-bit code is 2n−1 − 1, while the
values depend on the PGA setting. The switching clock is
generated by the onboard clock oscillator, so its frequency
(nominally 275kHz) is dependent on supply voltage and
temperature.
minimum n-bit code is −1 × 2n−1
.
For example, the ideal expression for output codes with a
data rate of 16SPS and PGA = 2 is:
The common-mode and differential input impedances are
different. For a gain setting of the PGA, the differential
input impedance is typically:
(VIN)) * (VIN*
)
Output Code + 16384 2
2.048V
2.8MΩ/PGA
The ADS1112 outputs all codes right-justified and
sign-extended. This feature makes it possible to perform
averaging on the higher data rate codes using only a 16-bit
accumulator.
The common-mode impedance also depends on the PGA
setting. See the Electrical Characteristics for details.
The typical value of the input impedance often cannot be
neglected. Unless the input source has a low impedance,
the ADS1112 input impedance may affect the
measurement accuracy. For sources with high output
impedance, buffering may be necessary. Bear in mind,
however, that active buffers introduce noise, and also
introduce offset and gain errors. All of these factors should
be considered in high-accuracy applications.
Table 2 shows the output codes for various input levels.
SELF-CALIBRATION
The previous expressions for the ADS1112 output code do
not account for the gain and offset errors in the modulator.
To compensate for these, the ADS1112 incorporates
self-calibration circuitry.
Because the clock oscillator frequency drifts slightly with
temperature, the input impedances will also drift. For many
applications, this input impedance drift can be neglected,
and the expression given above for typical input
impedance can be used.
The self-calibration system operates continuously and
requires no user intervention. No adjustments can be
made to the self-calibration system, and none need to be
made. The self-calibration system cannot be deactivated.
The offset and gain error figures shown in the Electrical
Characteristics include the effects of calibration.
ALIASING
If frequencies are input to the ADS1112 that exceed half
the data rate, aliasing will occur. To prevent aliasing, the
input signal must be bandlimited. Some signals are
inherently bandlimited. For example, the output of a
thermocouple, which has a limited rate of change, may
nevertheless contain noise and interference components.
These nuisance factors can fold back into the sampling
band just as with any other signal.
CLOCK OSCILLATOR
The ADS1112 features an onboard clock oscillator, which
drives the operation of the modulator and digital filter. The
Typical Characteristics show variations in data rate over
supply voltage and temperature.
It is not possible to operate the ADS1112 with an external
system clock.
The ADS1112 digital filter provides some attenuation of
high-frequency noise, but the digital filter Sinc1 frequency
response cannot completely replace an anti-aliasing filter.
For a few applications, some external filtering may be
needed; in such instances, a simple RC filter will suffice.
INPUT IMPEDANCE
The ADS1112 uses a switched-capacitor input stage. To
external circuitry, it looks roughly like a resistance. The
resistance value depends on the capacitor values and the
rate at which they are switched. The switching frequency
is the same as the modulator frequency; the capacitor
When designing an input filter circuit, remember to take
into account the interaction between the filter network and
the input impedance of the ADS1112.
DIFFERENTIAL INPUT SIGNAL
DATA RATE
(1)
−2.048V
−1LSB
ZERO
+1LSB
+2.048V
15SPS
30SPS
60SPS
240SPS
8000
FFFF
FFFF
FFFF
FFFF
0000
0000
0000
0000
0001
0001
0001
0001
7FFF
3FFF
1FFF
07FF
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
C000
H
E000
H
H
F800
(1)
Differential input only; do not drive the ADS1112 inputs below −200mV.
Table 2. Output Codes for Different Input Signals
7
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