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SBAS282D − JUNE 2003 − REVISED MARCH 2004
ELECTRICAL CHARACTERISTICS
All specifications at −40°C to +85°C, VDD = 5V, and all PGAs, unless otherwise noted.
ADS1112
MIN
TYP
MAX
PARAMETER
CONDITIONS
UNIT
ANALOG INPUT
Full-Scale Input Voltage
(V
) − (V
)
2.048/PGA
2.8/PGA
V
V
IN+
IN+
IN−
Analog Input Voltage
V
to GND or V
IN−
to GND
GND − 0.2
VDD + 0.2
Differential Input Impedance
Common-Mode Input Impedance
MΩ
PGA = 1
PGA = 2
PGA = 4
PGA = 8
3.5
3.5
1.8
0.9
MΩ
MΩ
MΩ
MΩ
SYSTEM PERFORMANCE
Resolution and No Missing Codes
DR = 00
DR = 01
DR = 10
DR = 11
12
14
15
16
12
14
15
16
Bits
Bits
Bits
Bits
Data Rate
DR = 00
DR = 01
DR = 10
DR = 11
180
45
240
60
308
77
SPS
SPS
SPS
SPS
22
30
39
11
15
20
Output Noise
See Typical Characteristic Curves
(1)
(2)
Integral Nonlinearity
Offset Error
DR = 11, PGA = 1, End Point Fit
0.004
0.010
% of FSR
PGA = 1
PGA = 2
PGA = 4
PGA = 8
1.2
0.7
0.5
0.4
8
mV
mV
mV
mV
4
2.5
1.5
Offset Drift
PGA = 1
PGA = 2
PGA = 4
PGA = 8
1.2
0.6
0.3
0.3
µV/°C
µV/°C
µV/°C
µV/°C
Offset vs VDD
PGA = 1
PGA = 2
PGA = 4
PGA = 8
800
400
200
150
µV/V
µV/V
µV/V
µV/V
Channel Offset Match
Match between any two channels
30
µV
%
%
(3)
Gain Error
0.05
0.02
0.40
0.10
40
(3)
PGA Gain Error Match
Match between any two PGA gains
(3)
Gain Error Drift
5
ppm/°C
Gain vs VDD
80
ppm/V
Channel Gain Match
Match between any two channels
At DC and PGA = 8
0.01
105
100
%
dB
Common-Mode Rejection
95
At DC and PGA = 1
dB
DIGITAL INPUT/OUTPUT
Logic Level
V
V
V
0.7 • VDD
GND − 0.5
GND
6
V
V
V
IH
IL
0.3 • VDD
0.4
I
= 3mA
OL
OL
Input Leakage
I
I
V
V
= 5.5V
= GND
10
µA
µA
H
L
IH
IL
−10
2.7
POWER-SUPPLY REQUIREMENTS
Power-Supply Voltage
VDD
5.5
V
Supply Current
Power-Down
Active Mode
0.05
240
2
µA
µA
350
Power Dissipation
VDD = 5.0V
VDD = 3.0V
1.2
1.75
mW
mW
0.675
(1)
(2)
(3)
99% of full-scale.
FSR = full-scale range = 2 × 2.048V/PGA = 4.096V/PGA.
Includes all errors from onboard PGA and reference.
3
BB [ BURR-BROWN CORPORATION ]
