AUSTIN SEMICONDUCTOR, INC.
ADVANCE INFORMATION
nvSRAM
AS8nvLC512K32
Austin Semiconductor, Inc.
SRAM Read Cycle #2: CE\ and OE\ Controlled3, 13, 17
Address
Address Valid
tRC
tHZCE
tACE
tAA
CE
tLZCE
tHZOE
tDOE
OE
tHZBE
tLZOE
tDBE
BHE, BLE
tLZBE
High Impedance
Standby
Data Output
Output Data Valid
tPU
tPD
Active
ICC
SRAM Write Cycle #1: WE\ Controlled3, 16, 17,18
tWC
Address
Address Valid
tSCE
tHA
CE
tBW
BHE, BLE
tAW
tPWE
WE
Data Input
Data Output
tSA
tHD
tSD
Input Data Valid
tLZWE
tHZWE
High Impedance
Previous Data
Note
18. CE\ or WE\ must be >VIH during address transitions.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8nvLC512K32
Rev. 0.0 08/09
10